CMOS comparator

Abstract

The invention discloses a complementary metal oxide semiconductor comparator. The feedback offset adjustment circuit (5) is composed of a switched capacitor filter (6) and a voltage adjustment circuit (7). The output terminal WA1 of the output latch (4) is connected to the The input terminal of the switched capacitor filter (6) is connected, the output terminal of the switched capacitor filter (6) is connected with the input terminal of the voltage regulation circuit, the output terminal of the voltage regulation circuit is connected with one end of the comparator offset calibration capacitor C3, and the comparator offset The other end of the calibration capacitor C3 is connected to the input terminal IN of the first-stage amplifier (1), one end of the symmetrical capacitor C4 of the comparator offset calibration capacitor C3 is connected to the inverting input terminal INR of the first-stage amplifier (1), the other end is grounded, and the switched capacitor Filter (6) is made up of first branch (61) and second branch (62), and first branch (61) is made up of first transmission gate TF1 and second transmission gate TF2, and second branch (62 ) is composed of an inverter INV4, a third transmission gate TF3 and a fourth transmission gate TF4, the input terminal of the inverter INV4 is connected to the output terminal WA1 of the output latch.

Description

technical field [0001] The invention relates to a comparator circuit suitable for successive approximation analog-to-digital converters, pipeline structure analog converters and other high-precision comparators, in particular to a complementary metal-oxide-semiconductor comparator. Background technique [0002] Speed ​​and precision are two of the most important characteristics of analog circuits, especially in high-speed and high-precision analog-to-digital converters (ADCs). However, the speed and accuracy of the ADC circuit are usually determined by the accuracy and speed of the comparator, because the comparator input offset and delay directly affect the accuracy and speed of the analog-to-digital converter circuit. Due to process drift, the mismatch of circuit elements in the comparator makes the comparator input offset voltage usually about 50mV. Therefore, in order to meet the high-precision analog-to-digital converter (ADC) design, it is ne...

AI Technical Summary

Problems solved by technology

Although input offset storage and output offset storage can greatly reduce the input offset voltage of the comparator, these two offset cancellation techniques need to add an offset storage capacitor to the signal transmission path, which reduces the speed of the comparator, and it cannot eliminate the transistor switch. The effect of channel charge injection and clock feedthrough on the input offset voltage caused by

For on-chip resistor laser trimming, the calibration process is only performed once during chip manufacturing, which requires the circuit to have time and temperature stability, and requires additional calibration procedures, increasing costs

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