Semiconductor integrated circuit and data processing system
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embodiment 1
Preferred Embodiment 1
[0081]Referring to FIG. 2, there is shown a block diagram of a microcomputer (MCU) 1 according to a preferred embodiment 1 of the present invention. The microcomputer 1 shown in FIG. 2 is an exemplary semiconductor integrated circuit concerned with the present invention, and for example, the microcomputer 1 is formed over a single semiconductor substrate made of single-crystal silicon or the like by such a semiconductor device manufacturing technique as a complementary MOS integrated circuit fabrication technique.
[0082]The microcomputer 1 is used as a so-called IC-card microcomputer that is specifically applied to secure processing such as user authentication, though not particularly limited thereto.
[0083]In the microcomputer 1, there are included a mask ROM 3 as a fixed memory device, an EEPROM 4 as an electrically rewritable nonvolatile memory device, and a RAM 2 as a volatile memory device, though not particularly limited thereto. The microcomputer 1 further...
embodiment 2
Preferred Embodiment 2
[0107]Referring to FIG. 22, there is shown a basic circuit configuration wherein detection diodes used as photodetector elements D are disposed in parallel in the logic circuit 6.
[0108]In a region containing the logic circuit 6, there are distributively disposed a plurality of series-coupled buffers that are arranged to have a constant logical value of primary-stage input, e.g., a high-level logical value “1”. A plurality of detection diodes 200 are parallel-coupled in a reverse-biased state between a ground voltage Vss and a signal path PSS extending from an input of one of the buffers 201 to an output of a buffer 201 located at a stage anterior thereto. That is, the cathode of each detection diode 200 is coupled to the signal path PSS, and the anode thereof is coupled to the ground voltage. Reference numeral 203 in FIG. 22 indicates a logic-matching inverter. An inverted signal of an output from the last-stage buffer 201 is fed to a set terminal of a set / rese...
embodiment 3
Preferred Embodiment 3
[0126]Referring to FIG. 31, there is shown a data processing system employing the microcomputer 1 described above. As an exemplary IC card used for data processing, a multi-function SIM (Subscriber Identity Module) card 301 is indicated in FIG. 31. The multi-function SIM card 301 is mounted on such an apparatus as a mobile telephone, a mobile data terminal, or a personal computer (PC) for the purpose of user authentication in mobile communication, specific transactions, or the like. Reference numeral 302 in FIG. 31 indicates a host unit (HOST) on which the multi-function SIM card 301 is mounted. Interfacing with the HOST 302 is provided by using a cable 303, for example.
[0127]The multi-function SIM card 301 comprises an interface controller (CNT) 306, a flash memory (FLASH) 307 serving as an electrically rewritable nonvolatile memory, and a microcomputer 1 (mounted on a circuit board not shown). The interface controller 306 includes a host interface (HIF) 310, ...
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Abstract
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