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Method for manufacturing selective emitter junction of multricrytalline silicon solar cell

A solar cell and selective technology, applied in circuits, electrical components, semiconductor devices, etc., can solve the problems of difficult matching of sintering temperature, diffusion temperature, serious phosphorus volatilization, and long process time, so as to achieve improved open circuit voltage Voc and high photoelectric conversion Efficiency, the effect of improving the collection rate

Inactive Publication Date: 2009-11-25
TRINA SOLAR CO LTD
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  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

[0006] The deficiencies in the prior art are: the cost of laser groove method is high, and the production capacity is small; the method of phosphor paste printing is not easy to control the width of grid line diffusion, and the volatilization of phosphorus is serious, which cannot form a perfect selective emission junction; In the method of doping phosphorus printing, the sintering temperature of silver and the diffusion temperature of phosphorus are difficult to match
[0007] In addition, the existing method of preparing selective emission junctions with thin films uses S i o 2 Thin film, because it needs high temperature thermal oxidation to form a thin film required for barrier, the process time is long, which is not conducive to production, and high process temperature will greatly reduce the minority carrier lifetime of silicon wafers

Method used

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  • Method for manufacturing selective emitter junction of multricrytalline silicon solar cell

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Embodiment 1

[0027] In order to remove the mechanical damage layer on the surface of the silicon wafer and remove the surface oil and metal impurities to form an uneven suede surface and increase the absorption of sunlight by the silicon wafer, the silicon wafer is first cleaned and textured, and then PECVD technology is used on the surface of the silicon wafer Coating a layer of silicon nitride film, the coating temperature is 200 ℃ ~ 500 ℃, the film thickness is 5nm ~ 200nm, and then use screen printing technology to print the corrosive paste on the surface of silicon nitride for slotting to obtain the required Silicon nitride mask, the shape of the groove is the shape of the electrode, the corrosive slurry is 1% to 50% of ammonium hydrogen fluoride and organic matter, the drying temperature is 200°C to 500°C, and the time is 5 to 30min. After drying Wash the reactants with an alkaline solution, and then perform re-diffusion at a diffusion temperature of 890°C to 950°C. After heavy doping...

Embodiment 2

[0029] After the silicon wafer is cleaned and textured, shallow diffusion is carried out. The diffusion process is the same as the conventional process, and then PECVD technology is used to coat a layer of silicon nitride film on the surface of the silicon wafer. The coating temperature is 200 ° C ~ 500 ° C, and the film thickness is 5 nm ~ 200 nm. , and then use screen printing technology to print the corrosive slurry on the surface of silicon nitride for slotting to obtain the required silicon nitride mask. The shape of the groove is the shape of the electrode, and the corrosive slurry is 1% to 50 % ammonium hydrogen fluoride and organic matter, the drying temperature is 200 ° C ~ 500 ° C, the time is 5 ~ 30 minutes, after drying, the reactants are cleaned with alkaline solution, and then re- Diffusion, forming a selective emission junction.

Embodiment 3

[0031] After the silicon wafer is cleaned and textured, re-diffusion is carried out. The diffusion temperature is 890°C-950°C. After removing the phosphosilicate glass, PECVD technology is used to coat a layer of silicon nitride film on the surface of the silicon wafer. The coating temperature is 200°C-500°C. The thickness is 5nm to 200nm, and then the corrosive paste is printed on the surface of silicon nitride by screen printing technology to make grooves to obtain the required silicon nitride mask. The grooved area is the non-electrode area, and the corrosive paste The material is 1% to 50% ammonium hydrogen fluoride and organic matter. The drying temperature is 200°C to 500°C and the time is 5 to 30min. After drying, the reactants are cleaned with an alkaline solution. The cleaning time and solution The concentration is related, after cleaning for a certain period of time, a shallowly doped region can be obtained, and then use 1% to 30% hydrofluoric acid solution or 1% to 5...

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Abstract

The invention relates to a method for manufacturing a selective emitter junction of a multricrytalline silicon solar cell. The method comprises a step that slicon nitride is used as a masking film to perform dual diffusion and shallow diffusion so as to form dual diffusion region and shallow diffusion region on the surface of a silicon chip. Favorable to the improvement of the collection of photon-generated carrier, particularly the improvement of the collection rate of shortwave photon-generated carrier, the method can improve the open circuit voltage Voc, short-circuit current Isc and filling factor F.F. of the solar cell so as to make the cells gain high photoelectric transformation efficiency. The advantage results from the different doping concentrations and the different diffusion depth formed in the different regions of the solar cell.

Description

technical field [0001] The invention relates to the technical field of manufacturing crystalline silicon solar cells, in particular to a method for preparing a selective emission junction of a crystalline silicon solar cell. Background technique [0002] The process flow of the traditional solar cell preparation method is cleaning texture, diffusion, edge corrosion and phosphorus silicon glass removal, PECVD silicon nitride film coating, screen printing, sintering and battery performance testing. This traditional process determines that the efficiency of solar cells cannot be greatly improved, and the realization of the selective emission junction can greatly improve the efficiency. The existing realization methods of the selective emission junction are: [0003] 1. Laser groove method: first grow a thin film on the surface of the silicon wafer, then use a laser to groove the grid line, and realize the selective emission junction through the diffusion process. [0004] 2. P...

Claims

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Application Information

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IPC IPC(8): H01L31/18
CPCY02P70/50
Inventor 邓伟伟刘亚锋张学玲
Owner TRINA SOLAR CO LTD
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