Trench gate charge storage type IGBT (Insulated Gate Bipolar Translator) and manufacturing method thereof
A charge storage and charge storage layer technology, applied in circuits, electrical components, semiconductor/solid-state device manufacturing, etc., can solve problems such as increasing charge/discharge time, increasing device saturation current density, and affecting device switching loss compromise characteristics.
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[0098] Example 1:
[0099] A trench gate charge storage type IGBT with one-half cell such as Figure 4 As shown, the section along the AB and CD lines is as Image 6 with Figure 7 As shown, a three-dimensional coordinate system is established with any inflection point of a half cell as the origin, and the two sides of the bottom surface of the quarter cell intersecting the inflection point are used as the x-axis and the z-axis respectively, passing the inflection point and The straight line perpendicular to the bottom surface is used as the y-axis, the direction of the x, y, and z-axis see Figure 4 ;
[0100] The one-half cell includes a collector metal 14, a P-type collector region 13, an N-type drift region 9 and an emitter metal 1 which are sequentially stacked from bottom to top; the top layer of the N-type drift region 9 has N-type charge storage layer 6, P-type base region 5, P+ body contact region 4, and N+ emitter region 3; said P-type base region 5 is located on the top ...
Example Embodiment
[0102] Example 2:
[0103] A trench gate charge storage type IGBT with one-half cell such as Figure 8 As shown, the cross-sections along the AB line, CD line, EF line and GH line are as follows Figure 10 to 13 As shown, the method of establishing the coordinate system is the same as that of Example 1, see Figure 8 ;
[0104] The difference between this embodiment and embodiment 1 is that the extension depth of the gate electrode 71 in the top layer of the N-type drift region 9 is equal to the extension depth of the split electrode 81, but the extension width of the gate electrode 71 at both ends of the top layer of the device is less than The extended width of the split electrode 81, while remaining part of the split electrode dielectric layer 82 and a part of the split electrode 81 structure on the top layer of the device; the thickness of the split electrode dielectric layer 82 is greater than the thickness of the gate dielectric layer 72.
[0105] In this embodiment, a portion ...
Example Embodiment
[0106] Example 3:
[0107] A trench gate charge storage type IGBT with one-half cell such as Figure 14 As shown, the cross-sections along the AB line, CD line, EF line and GH line are as follows Figure 16 to 19 As shown, the method of establishing the coordinate system is the same as that of Example 1, see Figure 14 ;
[0108] The difference between this embodiment and the second embodiment lies in that: this embodiment does not have a split electrode 81 and a split electrode dielectric layer 82 structure on the top layer of the device. The split electrode 81 and the split electrode dielectric layer 82 are located at the bottom of the gate electrode 71, and the N+ emitter region 3 The depth of the P+ body contact region 4 along the z-axis direction is equal and smaller than the depth of the P-type base region 5 along the z-axis direction. At the same time, the thickness of the gate electrode 71 connected to the N+ emitter region 3 through the gate dielectric layer 72 is greater t...
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