A high-speed low-power high-voltage power device
A high-voltage power device, low power consumption technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems that affect the uniformity and reliability of device current distribution, reduce the efficiency of anode hole injection, and limit the parallel use of devices. Achieve the effects of eliminating voltage foldback, low conduction voltage drop, and fast turn-off speed
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Embodiment 1
[0016] Such as figure 1 As shown, the SOI LIGBT structure of this example includes a P substrate 1, a buried oxide layer 2, and an N-type drift region 3 stacked sequentially from bottom to top; one side of the surface of the N-type drift region 3 is a cathode structure and a groove structure, the other side is the anode structure;
[0017] The cathode structure includes a P well region 41, a P+ cathode region 51 and an N+ cathode region 61, wherein the P+ cathode region 51 and the N+ cathode region 61 are located on the top of the P well region 41, and the P+ cathode region 51 and the N+ cathode region 61 The common lead-out end of is a cathode; The groove structure includes a segmented groove grid 75 and a cathode groove 76, wherein the cathode groove 76 is closer to the anode structure; the groove bottom and side walls of the segmented groove grid 75 cover the first insulating The dielectric layer 71, the first insulating dielectric layer 71 surrounds the first conductive m...
Embodiment 2
[0022] Such as figure 2 As shown, compared with Embodiment 1, the P well region 42 in this example is located on the upper part of the N-type buffer layer 8, which is beneficial to improve the withstand voltage characteristics of the device, and further increase the turn-off speed of the device to reduce the turn-off speed. loss.
Embodiment 3
[0024] Such as image 3 As shown, compared with Embodiment 2, the anode terminal in this example is distributed in sections in the longitudinal direction by the P well region 42 and the N+ anode region 62, and the upper part of each section of the P well region 42 has the N+ anode Region 62, this segmented distribution method can increase the area of the parasitic NPN tube composed of N+ anode region 62 / P well region 42 / N-type buffer layer 8, which increases the electron extraction path during the device shutdown process, which is conducive to further Accelerates device turn-off and reduces turn-off losses.
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