Single electron trivalue storage based on coulomb baffle principle design and its preparation method

A principle design, Coulomb blocking technology, applied in the direction of electric solid devices, circuits, electrical components, etc., to achieve the effect of high storage density, enhanced storage time, and simple structure
CN1494150AInactive Publication Date: 2004-05-05INST OF PHYSICS - CHINESE ACAD OF SCI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
INST OF PHYSICS - CHINESE ACAD OF SCI
Publication Date
2004-05-05
Estimated Expiration
Not applicable · inactive patent

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Abstract

The storage device possesses an insulative base plate with a conducting material layer on it. There are two structures of multiple tunneling junctions, one single electron transistor and one storage junction unit. One end of two tunneling junctions through lead wire connected to each other is as input end for writing in voltage, and the other end of each tunneling junction is connected to a storage junction. Middle capacitance in storage junction unit is coupled each other. Single electron transistor possesses source pole, drain pole, quantum point weak coupled to source / drain pole and grid pole for controlling static chemical potential energy of quantum point. Quantum point is connected to storage junction unit through mode of capacitance coupling. The part possesses three stable store statuses. Only controlling movement of minute electron can implement normal operation of the part so as to realize storing information in super high density under low power consumption.
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Description

technical field

[0001] The invention belongs to a single-electron multi-value memory device, in particular to a single-electron multi-value memory with three stable storage states designed by utilizing the Coulomb blocking effect of a multi-tunnel junction structure and a preparation method thereof. Background technique

[0002] Memory accounts for 40% of the world's semiconductor market. Semiconductor products other than memory are updated every 2 years, while memory is a generation every 18 months. Taking the development of dynamic memory (DRAM) as an example, in 1988 Japan The line width of the lines on the silicon chip reached 0.8 microns, and the 4Mb DRAM came out, thus entering the era of ultra-large-scale integration ULSI; in 1992, the 16Mb chip with a line width of 0.5 microns was put into production; in 1994, the 64Mb chip with a line width of 0.35 microns was launched. Chip production; 0.13-micron 4Gb DRAM will soon be realized. However, maintaining the trend of c...

Claims

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