34results about How to "Implement multi-value storage" patented technology

The invention is concerned with the phase change film material containing silicon series cluster subject, that is the silicon group subject alloy TeaSibSb100-(a+b) with the a no lesser than 48 but no more than 60, and the b no less than 8 but no more than 40. The invention has the higher crystalline state resistance and non/crystalline resistance change ratio compare to the Ge2Sb2Te5 phase change film, the lower change ratio of the non/crystalline film thickness and melting point. The memorizer including the Si series sulfur group subject phase change film is with the higher ratio sum of the switch stability and it helps the writing operation current.

The invention discloses a time series data storage method, which comprises the steps of processing to-be-stored time series data into a defined data structure, and assembling the defined data structure into storage data; wherein the data structure at least comprises a measurement name, a label key, measurement and a time precision field of the time series data; wherein the warehouse-in data takesa mapping code at least comprising a measurement name mapping code, a timestamp and a label value included in a label key as a row key in the data point and takes a time difference relative to the timestamp as a limiter in the data point, and the time difference is related to time precision; and writing the storage data into a time sequence database. According to the method and the device, the label data which can be contained in the row key in the data point is improved, the multi-value storage of the time series data is realized, and the storage pressure caused by splitting the time series data is avoided.

The disclosed materials include three types: (1) alloy firm of TeaSibSbl00-(a+b); (2) firm of (TeaGebSb l00-(a+b) )c Si1oo-c formed from Ge-Sb-Te alloy with Si being doped into; (3) alloy firm of TeaSicGe(b-c)Sb l00-(a+b) obtained by using Si to partially replace Ge in Ge-Sb-Te alloy. Comparing common Ge2Sb2Te5 film of phase change, the invention possesses higher resistance of crystalline state, higher rate of change of amorphous state / crystalline state, lower rate of change of film thickness of amorphous state / crystalline state, and lower melting point. These characters make storage devices of film of phase change containing chalcogenide in Si group possess higher rate of on/off and stability of device. The invention makes for lowering operation current for writing storage devices as well as for realizing storage in multiple values in higher density.

The invention provides a resistance random access memory based on a vanadium oxide/aluminum oxide laminated structure. The resistance random access memory is composed of a lower electrode, a resistance random layer and an upper electrode to form of the laminated structure, wherein the resistance random layer is of a laminated structure of a vanadium oxide film and an aluminum oxide film. The thickness of each layer is that: the thickness of the lower electrode is 50-200nm, the thickness of the vanadium oxide film is 5-100nm, the thickness of the aluminum oxide film is 1-50nm, and the thickness of the upper electrode is 50-200nm. In a manufacturing method of the resistance random access memory, the vanadium oxide film is manufactured by a radio-frequency sputtering method, and the aluminum oxide film is manufactured by a magnetron sputtering or thermal oxidation method on the vanadium oxide film. The resistance random access memory has the advantage that the resistance random access memory adopts the vanadium oxide/aluminum oxide laminated structure and has twice reset phenomena, three impedance states including a low resistance state, a middle resistance state and a high resistance state can be obtained, resistance value ratio among the resistance states is more than 10 times, in addition, the resistance random access memory is further provided with good retentivity and repeatability.

The invention discloses a one time programmable memory and a preparation method thereof. The one time programmable memory provided by the invention comprises a lower electrode, a lower electrode and a resistive functional film formed between the upper electrode and the lower electrode. A Schottky barrier is formed between the upper electrode and the resistive functional film; and an ohmic contact is formed between the resistive functional film and the lower electrode. The invention utilizes rectification characteristic of the resistive functional film at a low resistance state to effectively inhibit the read crosstalk in a cross array structure, so as to facilitate integration of the memory and a peripheral circuit, and simplify preparation process of the device.

The invention discloses a resistive random access memory capable of realizing multilevel storage. The resistive random access memory capable of realizing the multilevel storage comprises a semiconductor substrate, N-1 groups of double-layer structures and top electrodes on the N-1 groups of double-layer structures, wherein each N-1 group of double-layer structure consists of an electrode and one resistive layer positioned on the electrode; the N-1 groups of double-layer structures are positioned on the substrate and are successively overlaid from bottom to top, wherein N is a positive integer greater than or equal to 3; all odd-number electrodes from bottom to top are connected in parallel to serve as the lower electrode of the resistive random access memory; all even-number electrodes from bottom to top are connected in parallel to serve as the upper electrode of the resistive random access memory. Therefore, according to the resistive random access memory capable of realizing the multilevel storage, which is disclosed by the invention, in a mode that multiple electrodes and the resistive layers are alternatively overlaid, voltages required for each resistive layer to generate resistance change are different, resistance values after the resistance change happens are different, so that the multilevel storage of a memory unit structure is realized, and no additional area is occupied by the memory unit disclosed by the invention because of adopting a longitudinal-overlaying structure.

The invention provides a memory array reading method based on unidirectionally-connected memory cells. A memory array comprises multiple word lines, multiple bit lines intersecting with the word lines, multiple unidirectionally-connected memory cells which are arranged at the intersection points of the word lines and the bit lines and connected with the word lines and the bit lines and peripheral reading circuits for reading and writing the corresponding memory cells connected to the same bit lines. The method comprises the steps that first voltage is applied to the word line to which the selected memory cell belongs, and second voltage is applied to the other word lines of the memory array; meanwhile, the second voltage is applied to the bit line to which the selected memory cell belongs, and the first voltage is applied to the other bit lines; the bit line where the memory cell is located is read and written through the corresponding peripheral circuit.

The invention provides a tri-state spinning electronic device, a storage unit, a storage array and a read-write circuit, and the tri-state spinning electronic device comprises a bottom electrode, a magnetic tunnel junction and a top electrode from bottom to top. The magnetic tunnel junction comprises a spin-orbit coupling layer, a ferromagnetic free layer, a barrier tunneling layer, a ferromagnetic reference layer, three local magnetic domain wall pinning centers and a magnetic domain wall nucleation center. For modulating an antisymmetric exchange effect, the magnetic domain wall pinning center is embedded into a heavy metal and ferromagnetic free layer interface; the magnetic domain wall nucleation centers are arranged at the two ends of the ferromagnetic free layer; current pulse flows through the spin-orbit coupling layer to generate spin current to be injected into the ferromagnetic free layer, a spin-orbit torque effective field drives a domain wall to move and displace under the regulation and control of a full electric field, the displacement can be modulated through the pulse number, pulse width and direction of the current, and the CMOS process compatibility and high reliability are achieved. The invention also provides a tri-state read-write circuit and a tri-valued network computing application scheme thereof, and high-performance GXNOR operation of a three-valued spinning electronic device is realized.

The invention provides a preparation method of a resistive random access memory. The preparation method comprises the following steps: providing a substrate; forming a lower electrode on the substrate; forming a first resistive random material layer on the lower electrode and the upper surface of the substrate; forming a second resistive random material layer on the first resistive random materiallayer, wherein the resistive state of the second resistive random material layer is different from that of the first resistive random material layer; and forming an upper electrode on the second resistive random material layer. The second resistive random material layer is additionally arranged between the first resistive random material layer and the upper electrode so that the conversion undervarious resistance states (>2) of the resistive random access memory can be realized, and thus multi-value memory can be realized and the data storage amount can be increased on the premise that the memory chip area is unchanged.

The invention is concerned with a kind of phase change film material with chalcogenide in silicon series for phase change storage, belonging to micro-electronics technology field. Si element takes place of Ge element of TeaGebSb100-(a+b) alloy to form TeaGeb-cSicSb100-(a+b) alloy film, and a is from 48 to 60, b is from 8 to 40, the replace scalar c of Si is from 1 to 40 atom percent. This invention has higher crystal resistance than common Ge2Sb2Te5 phase change film, and more higher amorphous/crystalline state change ratio of resistance and more lower amorphous/crystalline state film thickness change ratio and lower melting point. This kind of storage has more higher open/close ratio and stability of piece to reduce writing current of storage and get storage multi-value with higher density.

The storage device possesses an insulative base plate with a conducting material layer on it. There are two structures of multiple tunneling junctions, one single electron transistor and one storage junction unit. One end of two tunneling junctions through lead wire connected to each other is as input end for writing in voltage, and the other end of each tunneling junction is connected to a storage junction. Middle capacitance in storage junction unit is coupled each other. Single electron transistor possesses source pole, drain pole, quantum point weak coupled to source/drain pole and grid pole for controlling static chemical potential energy of quantum point. Quantum point is connected to storage junction unit through mode of capacitance coupling. The part possesses three stable store statuses. Only controlling movement of minute electron can implement normal operation of the part so as to realize storing information in super high density under low power consumption.

The invention provides a construction method of a nanowire and a data storage method. The construction method of the nanowire comprises the following steps of S1, sequentially arranging a lower electrode layer, an insulation layer and an upper electrode layer on a substrate in a lamination way, wherein the upper electrode layer or the lower electrode layer is a ferromagnetic electrode layer; and S2, applying a positive scanning voltage onto the ferromagnetic electrode layer so that positive potential difference exists between the lower electrode layer and the upper electrode layer to form the nanowire. Compared with the construction method of the nanowire in the prior art, the construction method provided by the invention has the advantages that the preparation process is simplified, the preparation cost is reduced, the process stability and the preparation efficiency are improved, and the construction method can be widely applied and promoted; and moreover, after the construction method of the nanowire is applied to a storage structure of M/I/M, a resistance random access effect and a spin correlation effect can be simultaneously achieved, so that multi-state operation and multi-value storage in a simple structure are achieved, and a carrier is provided for a multi-stage storage device by a magnetoelectric coupling effect.

The invention provides a memory cell including a first electrode, a heater including a plurality of sub-heaters, a phase-change material layer, and a second electrode; wherein the phase-change material layer is located between the second electrode and the first electrode and is electrically connected with the second electrode, one end of each sub-heater is electrically connected with the first electrode, and the other end of each sub-heater is electrically connected with different areas of the phase-change material layer. At least two sub-heaters in the plurality of sub-heaters are different in heat output to the phase-change material layer within the same time, so that the memory cell can present at least three different resistance states, and each resistance state of the memory cell canrepresent binary data respectively. Therefore, multi-valued storage is realized on the premise of not changing the size of the memory cell, and the storage density of the memory cell is increased.

A method for realizing completeness of client data includes distinguishing personal client data and unit client data, distinguishing unit value basic attribute and multivalue self - defined attribute of client data and recording information of data provider, data reviser, data value prior to revision, data value after revision, etc in detail way.