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Nano line array in multiplayer structure, and preparation method

A nanowire array and multilayer structure technology, which is applied in nanostructure manufacturing, nanotechnology, nanotechnology, etc., can solve the problem that there are no public reports on oxide multilayer nanowires, and it is difficult to obtain sulfide multilayer nanowires and devices. Unfavorable production and other problems, to achieve the effect of low cost, orderly arrangement and high production efficiency

Inactive Publication Date: 2006-12-06
SUN YAT SEN UNIV
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  • Claims
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Problems solved by technology

The components of multilayer semiconductor nanowires prepared by these methods are mostly III-V compounds, while oxide multilayer nanowires have not yet been publicly reported.
In addition, due to the complexity of the electrolyte for the preparation of sulfide by electrochemical deposition, it is difficult to obtain sulfide multilayer nanowires.
The epitaxial growth method has a higher preparation temperature, which is not conducive to device production

Method used

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  • Nano line array in multiplayer structure, and preparation method

Examples

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Effect test

Embodiment 1

[0017] Example 1: Preparation of sulfide semiconductor / sulfide semiconductor nanowire arrays.

[0018] An aluminum oxide porous template coated with a 2 μm thick gold film on one side is selected, the pore diameter of the template is 100 nm, the hole spacing is 100 nm, and the thickness is 10 μm. The nickel / copper multilayer nanowire array is electrochemically deposited, and the nickel / copper plating electrolyte is composed of a mixed aqueous solution of copper sulfate (final concentration 0.2M) and nickel sulfate (final concentration 2M). Nickel (-1.4V) / copper (-0.3V) pulse alternating constant voltage growth method was used, and the deposition time was 1s and 10s, respectively. The thickness of the nickel / copper multilayer is 40nm / 20nm. The nanowire length is 1 μm. The template with nickel / copper multilayer nanowires grown in the hole is immersed in 3M NaOH solution to remove the aluminum oxide template, and a nickel / copper multilayer nanowire array regularly arranged on t...

Embodiment 2

[0021] Embodiment 2: Preparation of an oxide semiconductor / oxide semiconductor nanowire array.

[0022] An aluminum oxide porous template coated with a 5 μm nickel film on one side is used to electrochemically deposit a nickel / copper multilayer nanowire array. The aperture of the template is 50 nm, the hole spacing is 100 nm, and the thickness is 10 μm. The nickel / copper plating electrolyte is composed of a mixed aqueous solution of copper sulfate (final concentration 0.2M) and nickel sulfate (final concentration 2M). The nickel (-1.4V) / copper (-0.3V) pulse alternating constant voltage growth method was adopted, and the deposition time was 1s and 10s, respectively. The thickness of the nickel / copper multilayer is 20nm / 40nm. The nanowire length is 1 μm.

[0023] The template with nickel / copper multilayer nanowires grown in the holes is immersed in 3M NaOH solution to remove the aluminum oxide template, and a nickel / copper multilayer nanowire array regularly arranged on the su...

Embodiment 3

[0026] Example 3: Preparation of metal / sulfide semiconductor nanowire arrays.

[0027] A gold / iron multilayer nanowire array was electrochemically deposited on an aluminum oxide porous template coated with a 1 μm gold film on one side, with a template aperture of 80 nm, a hole spacing of 100 nm, and a thickness of 20 μm. Gold plating solution consists of HAuCl 4 ·3H 2 O(1gl -1 ) and H 2 SO 4 (7gl -1 ) composition, the iron plating solution consists of 0.5M FeSO4 and 0.5M H 2 SO4 solution composition. The process parameters of gold / iron multilayers were 10V, 2S and -1.5V, 3S, respectively, by double-groove alternating electrochemical constant-voltage deposition method. A gold / iron multilayer thickness of 20nm / 30nm was obtained. The nanowire length is 2 μm.

[0028] The template with gold / iron multilayer nanowires grown in the hole is immersed in 3M NaOH solution to remove the aluminum oxide template, and a gold / iron multilayer nanowire array regularly arranged on the s...

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Abstract

An array of semiconductor nanowires with multi-layer structure features that said nanowire structure is a multi-layer nanowires formed by alternative arrangement of metal / semiconductor or semiconductor / semiconductor, and said multi-layer nanowires are arranged parallelly and perpendicularly to form an array. Its preparing process includes preparing multi-layer metallic nanowire array and sulfurizing or oxidizing gas-solid reaction.

Description

Technical field: [0001] The invention relates to a multilayer structure nanowire array and a preparation method thereof. Background technique: [0002] Nanostructured materials will produce quantum size effects when electrons are transported in space-constrained channels, and exhibit novel physical, chemical, and biological properties. At the same time, artificially precise orientation and assembly can be carried out in the nanometer space through various means, which provides an effective means of preparing nanoelectronic devices, and creates powerful conditions for applications in the fields of biology and medicine. It is also the future of biological information transmission. Potential components for molecular electronic devices. Semiconductor multilayer nanowires are easy to form quantum wire wells or quantum wire superlattices. Due to the different band gap widths of the two types of semiconductor materials, the movement of carriers is restricted, and some special phys...

Claims

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Application Information

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IPC IPC(8): B82B1/00B82B3/00
Inventor 任山吴起白许宁生陈军
Owner SUN YAT SEN UNIV
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