Semiconductor device and method for manufacturing same

Abstract

When a bulk silicon substrate and an SOI substrate are used separately, a board area is increased and so it is impossible to reduce the size of a semiconductor device as a whole. On the other hand, when an SOI-type MISFET and a bulk-type MISFET are formed on a same substrate, the SOI-type MISFET and the bulk-type MISFET should be formed in separate steps respectively, and thus the process gets complicated. A single crystal semiconductor substrate and an SOI substrate separated from the single crystal semiconductor substrate by a thin buried insulating film and having a thin single crystal semiconductor thin film (SOI layer) are used, and well diffusion layer regions, drain regions, gate insulating films and gate electrodes of the SOI-type MISFET and the bulk-type MISFET are formed in same steps. Since the bulk-type MISFET and the SOI-type MISFET can be formed on the same substrate, the board area can be reduced. A simple process can be realized by making manufacturing steps of the SOI-type MISFET and the bulk-type MISFET common.

Description

TECHNICAL FIELD[0001]The present invention relates to an MISFET having a stacked structure of semiconductor / insulating film / metal, and more specifically it relates to a semiconductor device in which an MISFET is formed on a substrate having an SOI (Silicon on Insulator) structure and a method for manufacturing the same.BACKGROUND ART[0002]Recently, as high integration and high performance of LSIs have progressed, miniaturization of MISFET (Metal / Insulator / Semiconductor Field Effect Transistor) is advanced and its gate length is scaled, so that a problem of the short-channel effect which lowers a threshold voltage Vth has become significant. The short-channel effect is caused by the fact that a spread of a depletion layer in source and drain portions of the MISFET influences a channel portion according to miniaturization of the channel length. Increasing impurity concentration in the channel portion to suppress the spread of the depletion layer in the source and drain portions is one...

AI Technical Summary

Benefits of technology

[0020]According to the invention according to the above-described means, since the device of a high withstand voltage system and the ESD protection device for preventing ESD breakdown (electrostatic breakdown) are formed as a bulk-MISFET on the same substrate, the board area can be made smaller as compared to a case where an SOI-type MISFET which is excellent in low power consumption and high speed and a bulk-type MISFET are formed on different substrates and are connected with each other. Moreover, steps for manufacturing the SOI-type MISFET and the bulk-type MISFET are made common, so that manufacture of both the devices can be realized without complicating the process.

Problems solved by technology

It is difficult to form a device of a high withstand voltage system, an ESD protection device for preventing ESD breakdown (electrostatic breakdown), and the like on the SOI substrate.

In this manner, when a bulk silicon substrate and an SOI substrate are used, two substrates are required, so that a board area cannot be made small, and therefore the whole semiconductor device cannot be made small.

Moreover, when an SOI-type MISFET and a bulk-type MISFET are tried to be manufactured on the same substrate, selective epitaxial growth technique is required, and it is required to manufacture an SOI-type MISFET and a bulk-type MISFET in different steps, for example as shown in Non-Patent Document 2, which results in such a problem that the process becomes complex.

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