Stacking slice type piezoresistor and manufacturing method thereof

A technology of varistors and varistors, which is applied in varistor cores, resistance manufacturing, varistors, etc., and can solve problems such as high production costs, long production cycles, and difficulty in electroplating nickel and tin treatment , to achieve the effect of shortening the production cycle and saving manufacturing costs

Active Publication Date: 2009-01-21
SHENZHEN ZHENHUA FU ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Wet production has strict requirements on casting slurry, and its production cycle is longer and the production cost is higher
Moreover, the erosion of the material by the electroplating ba

Method used

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  • Stacking slice type piezoresistor and manufacturing method thereof
  • Stacking slice type piezoresistor and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0056] Example 1

[0057] The manufacturing method of the varistor provided by the embodiment of the present invention includes the following steps:

[0058] (1) Powder preparation:

[0059] Grind and mix the varistor film materials uniformly for 20 hours to a particle size of 1.0μm, dry at 150°C, and sieving through 80 mesh. The material components and their weight percentages are:

[0060] Zinc oxide ZnO 85%

[0061] Bismuth oxide Bi 2 O 3 3.5%

[0062] Antimony Oxide Sb 2 O 3 5%

[0063] Cobalt oxide Co 3 O 4 2%

[0064] Manganese Carbonate MnCO 3 0.5%

[0065] Chromium oxide Cr 2 O 3 1%

[0066] Nickel oxide Ni 2 O 3 1%

[0067] Aluminum nitrate Al(NO 3 ) 3 ·9H 2 O 0.01%

[0068] Silver Nitrate AgNO 3 0.02%

[0069] Boric acid H 2 BO 3 1%

[0070] Barium titanate BaTiO 3 0.97%

[0071] Grind and mix the ceramic protective layer material uniformly for 20 hours to a parti...

Example Embodiment

[0092] Example 2

[0093] (1) Powder preparation:

[0094] Grind and mix the varistor film materials uniformly for 20 hours to a particle size of 1.0μm, dry at 150°C, and sieving through 80 mesh. The material components and their weight percentages are:

[0095] Grind and mix the ceramic protective layer material uniformly for 20 hours to a particle size of 1.0μm, dry at 150°C, sieving through 80 mesh, the material components and their weight percentages are:

[0096] Zinc oxide ZnO 3%

[0097] Silicon oxide SiO 2 50%

[0098] Bismuth oxide Bi 2 O 3 8%

[0099] Boron oxide B 2 O 3 12%

[0100] Alumina Al2 O 3 15%

[0101] Calcium oxide GaO 6.5%

[0102] Magnesium oxide MgO 2.5%

[0103] Manganese Carbonate MnCO 3 3%

[0104] (2) Disposing the slurry: Use the above powder ratio to dispose the slurry, and the method is the same as in Example 3.

[0105] (3) Tape making: Place the prepared tape making...

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Abstract

The invention is suitable for various electrical apparatus fields, and provides a multi-layer chip voltage-dependent and process for preparation, wherein the voltage-dependent comprises an upper cover, a lower cover, a voltage dependent resistor unit and a terminal electrode, the upper cover and the lower cover are made from voltage dependent resistor materials, and the voltage dependent resistor unit is arranged between the upper cover and the lower cover and is equipped with two inner electrodes. The multi-layer chip voltage-dependent and process for preparation are characterized in that the two inner electrodes are separately printed, a binding film is printed on one inner electrode, a voltage dependent resistor membrane band is printed on the binding film, and the other inner electrode is printed on the voltage dependent resistor membrane band. The process for preparation comprises the processes which are proportioning, pulping, preparing band, printing, hot water voltage sharing, cutting, dumping, sintering, sealing end and electroplating and the like. The multi-layer chip voltage-dependent is prepared through the process of the invention, the production cycle of products is greatly reduced, and the making cost of the products is saved.

Description

technical field [0001] The invention relates to a multilayer chip piezoresistor and a manufacturing method thereof. Background technique [0002] In the existing technology, the chip varistor is a new type of high-tech chip manufactured by using slurry film formation, lamination, pressure equalization, cutting, sintering, sealing, firing, electroplating and other chip processes. Type components are widely used in various mobile communication equipment, household appliances, medical equipment, automobiles and other fields. At present, most manufacturers at home and abroad adopt the "wet production process" of wet casting and lamination molding. Due to the strict requirements on casting slurry, wet production has a long production cycle and high production cost. Moreover, the erosion of the material by the electroplating bath and the diffusion of the electroplating will cause changes in the properties of the material, and it is not easy to perform electroplating nickel and t...

Claims

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Application Information

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IPC IPC(8): H01C7/10H01C7/112H01C1/02H01C17/00
Inventor 徐鹏飞高兴尧丁晓鸿樊应县肖倩
Owner SHENZHEN ZHENHUA FU ELECTRONICS
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