Semiconductor packaging base plate and manufacturing method thereof

Abstract

The invention relates to a semiconductor packaging base plate and a manufacturing method thereof. The semiconductor packaging base plate comprises a base plate body, a plurality of conductive poles and an insulating protection layer, wherein at least one surface of the base plate body is provided with a plurality of electrical connection gaskets; the conductive poles respectively completely wrap each electrical connection gasket; and the insulating protection layer is formed on the surface of the base plate body and is provided with an exposure part for exposing the conductive poles, thus the invention can shorten the distances among the conductive poles, can prevent the stress from being concentrated and the bottom filling materials from overflowing and can also lower the packaging height.

Description

technical field [0001] The invention relates to a semiconductor packaging substrate and a manufacturing method thereof, in particular to a semiconductor packaging substrate formed with conductive columns and a manufacturing method thereof. Background technique [0002] In the current Flip Chip technology, there are electrode pads on the active surface of the semiconductor chip of the integrated circuit (IC), and the organic circuit board also has electrical connection pads corresponding to the electrode pads. A solder structure or other conductive adhesive material is formed between the pad and the electrical connection pad of the circuit board, and the solder structure or conductive adhesive material provides the electrical connection and mechanical connection between the semiconductor chip and the circuit board, and the related manufacturing process that is, Figure 1A to Figure 1F shown. [0003] see Figure 1A Firstly, a circuit board 11 with a plurality of electrical ...

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Problems solved by technology

[0009] However, in the above-mentioned existing manufacturing method, the size of the opening 120 of the insulating protection layer and the size of the opening 140 of the resistance layer are very fine, generally about 50 μm-60 μm, so alignment is extremely difficult. In order to make the opening of the resistance layer 140 can be aligned with the opening 120 of the insulating protective layer. Usually, the size of the opening 140 of the resistive layer is increased to reduce the difficulty of alignment and improve the alignment accuracy of the process. When the opening 120 of the insulating protective layer has a diameter of When it is smaller, the size of the resistive layer opening 140 may also be increased to twice the size of the insulating protective layer opening 120 due to the limitation of machine precision.

[0010] However, enlarging the size of the resistive layer opening 140 will result in the formation of side edges 151 on the top surface of the conductive pillars 15, so that the distance between the conductive pillars 15 must be increased. Fine-pitch pre-solder bumps formed on

[0011] And the side edge 151 of the conductive pillar 15 is protruding from the surface of the insulating protection layer 12, and it is easy to generate stress due to temperature change and CTE (coefficient of thermal expansion) difference, and it is concentrated between the conductive pillar 15 and the side edge 151, and In case of damage

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