Integrated circuit resisting NMOS element total dose radiation based on materials with high dielectric constants
A technology of total dose irradiation and integrated circuits, which is applied in the field of electronics, can solve the problems of large channel mobility of parasitic tubes, increased power consumption of integrated circuits, and leakage currents, and achieves reduced off-state leakage currents, simple manufacturing process steps, The effect of broad application prospects
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[0019] The present invention will be further described below through a specific preparation example in conjunction with the accompanying drawings.
[0020] This embodiment prepares an integrated circuit based on the High-K material of the present invention to resist total dose irradiation of NMOS devices, which mainly includes the following steps:
[0021] 1) Formation of silicon dioxide and silicon nitride. Such as image 3 As shown, a layer of silicon dioxide with a thickness of about 100 angstroms to 200 angstroms is grown by thermal oxidation on a silicon substrate 1 as a stress buffer layer 2 between silicon nitride and the silicon substrate, and then a low-pressure chemical vapor phase is used to Deposition (LPCVD) method deposits a layer of 1000 angstrom to 1500 angstrom silicon nitride as the barrier layer 3 .
[0022] 2) Trench lithography and etching. Such as Figure 4 As shown, after defining the shown pattern with photolithography, the trapezoidal trench 4 is e...
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