Method for preparing silicon-based surface plasma waveguide having stepped structure

Abstract

The invention discloses a method for preparing a silicon-based surface plasma waveguide having a stepped structure in the technical field of nanometer semiconductors. The method comprises the following steps of: coating electron beam photoresist on a silicon-on-insulator (SOI) chip, and forming a waveguide pattern on a silicon layer through an electron beam exposure system and a reactive ion etching system; depositing high-nonlinearity polymer-regional regularity poly(3-hexylthiophene) on an SOI ridge waveguide; removing the electron beam photoresist and the high-nonlinearity polymer-regional regularity poly(3-hexylthiophene) thereon, and depositing the high-nonlinearity polymer-regional regularity poly(3-hexylthiophene) for the second time by a molecular beam deposition method; and plating metal silver on a polymer film by a radio frequency sputtering method, and preparing the silicon-based surface plasma waveguide having the stepped structure. The product has a nano-scale mode field and low transmission loss, and is combined with high-nonlinearity polymer materials to realize super-high nonlinearity.

Description

technical field [0001] The invention relates to a method in the field of nano-semiconductor technology, in particular to a method for preparing a silicon-based surface plasmon waveguide with a ladder structure. Background technique [0002] In recent years, nano-optics based on surface plasmon technology has received more and more attention. Surface plasmons break the diffraction limit of traditional dielectric waveguides, and can confine the light in the communication band to deep subwavelength waveguides, which can be like metal wires. Conduction electrons transport light at the nanometer scale, driving further reduction in device size and further increase in integration density. At the same time, as the chip gradually brings together multiple functions such as computing, storage, communication, and information processing, it promotes the realization of on-chip optical computing technology. In order to realize the logic and signal processing functions in optical computing...

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Problems solved by technology

But in this structure, when the effective mode field area is reduced to hundreds of square nanometers, the loss will increase sharply, which limits its nonlinear application.

[0005] The technology based on the silicon-on-insulator (SOI) structure makes it possible to integrate optoelectronic systems compatible with the CMOS process, but due to the moderate size of the third-order nonlinear coefficient of silicon, and the efficiency and speed of the third-order nonlinear effect are limited by double Photon Absorption and Low Velocity Free Carrier Absorption Effect

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