Etching process for semiconductors

A semiconductor and etching technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as rough surfaces and low etching rates

Inactive Publication Date: 2013-01-23
3M INNOVATIVE PROPERTIES CO
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, these processes suffer from several disadvantages, including extensive polymer depositi

Method used

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  • Etching process for semiconductors
  • Etching process for semiconductors
  • Etching process for semiconductors

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example

[0034] A II-VI semiconductor color conversion layer structure based on a CdMgZnSe alloy was grown by molecular beam epitaxy on an InP substrate. The color conversion layer structure is schematically shown in figure 2 , and the layer thicknesses and compositions are shown in Table I below. figure 2 It is a schematic diagram of the color conversion layer 200 , which includes a top window 202 , a light absorbing layer 204 , and a graded composition layer 206 whose composition gradually changes from the composition of the top window 202 to the composition of the light absorbing layer 204 . Embedded in the light-absorbing layer (not shown) are quantum wells that trap carriers produced when pump light is absorbed in the light-absorbing layer and re-emit longer wavelength light. Details of color converting structures can be found, for example, in US Patent No. 7,402,831 (Miller et al.).

[0035] Table I

[0036] Composition of the color conversion layer structure

[0037] ...

example 1

[0041] Example 1 - Ar etching of II-VI semiconductor with photoresist mask

[0042] A sample of the II-VI semiconductor color converter described above was coated with a photoresist mask with a stripe pattern using NR9-1000P negative photoresist (from Futerrex, Franklin, NJ). The dimensions of the stripe patterns are 2 μm and 100 μm. Small split samples of II-VI semiconductors with photoresist masks on them were placed on Si carrier wafers, loaded into the RIE chamber, and heated using 5-50 sccm Ar, 20-200 watts Rf power, 700-2000 Watts Inductively Coupled Plasma Power (ICP) Plasma etching was performed at a pressure of 4-30 mTorr and an etching time of 5 x 60 second intervals. Pixel stripes as small as 2 μm in width continued to exhibit strong photoluminescence several months after treatment. With the same conditions as in Comparative Example 1, with the 2 The same sample etched showed rapid degradation of photoluminescence after one day. image 3 A photomicrograph of a...

example 2

[0043] The Ar etching of 3 micron channel in the example 2-II-VI group semiconductor material

[0044]The patterned photoresist on the II-VI semiconductor color converter structure as described above in Table 1 was obtained by photolithography with NR9-3000PY negative photoresist (available from Futurrex, Franklin, NJ) and etched using the procedure of Example 1. Figure 4a is a scanning electron micrograph of the resulting structure and shows a pattern of 3 μm wide channels with ~6 μm bumps in between. Figure 4b Darkfield optical micrograph showing photoluminescence of semiconductor bumps. A series of emission "pixels" were observed in which the semiconductor color converter had been left untouched (protected by photoresist during etching).

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Abstract

A process for etching semiconductors, such as II-VI or III-V semiconductors is provided. The method includes sputter etching the semiconductor through an etching mask using a nonreactive gas, removing the semiconductor and cleaning the chamber with a reactive gas. The etching mask includes a photoresist. Using this method, light-emitting diodes with light extracting elements or nano/micro-structures etched into the semiconductor material can be fabricated.

Description

technical field [0001] The present disclosure broadly relates to a process for etching semiconductors. Background technique [0002] The rapid development of optoelectronics has created a need for methods of fabricating nanoscale patterns on semiconductor surfaces. Typically, these patterns are etched into the semiconductor substrate by a variety of techniques. For example, wet chemical etching has been used to etch various semiconductors. However, wet chemical etching can be isotropic, limiting the aspect ratio of features that can be fabricated, and the process has low uniformity. The production industry in the optoelectronics industry requires a more controlled etching process than can be achieved using wet etching. [0003] Due to the disadvantages of wet chemical etching, dry etching processes have been developed for semiconductors. For example, reactive ion etching has been used to produce well-controlled etch profiles in silicon substrates. Reactive ion etching i...

Claims

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Application Information

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IPC IPC(8): H01L21/3065H01L33/00
CPCH01L33/22H01L21/465H01L2933/0083Y02E10/50H01L33/0095H01L31/02363H01L21/3065
Inventor 迈克尔·A·哈斯特里·L·史密斯张俊颖
Owner 3M INNOVATIVE PROPERTIES CO
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