Distributed peripheral bus system of strict access and sampling time and control method thereof
A technology of sampling time and peripheral bus, applied in the direction of program control, comprehensive factory control, comprehensive factory control, etc., can solve problems such as low speed, inability to achieve accuracy of fieldbus, complex bus scheduling, etc., and achieve the effect of increasing data transmission speed
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[0050] The present invention will be further described in detail below in conjunction with the accompanying drawings and the embodiments of the present invention.
[0051] figure 1 It is a schematic diagram of a distributed peripheral bus system with strict access and sampling time according to an embodiment of the present invention.
[0052] Such as figure 1 As shown, the distributed peripheral bus system with strict access and sampling time, namely
[0053] FASTDP-BUS bus system, which includes a single bus master and one or more bus slaves. The physical layer of the bus system adopts dual redundant low-voltage differential signal (LVDS) bus technology, and the data transmission rate can reach 100Mbps; the data link layer adopts the field programmable gate array (FPGA) implementing the FASTDP-BUS link protocol Or the FASTDP-BUS protocol control chip is implemented, and the protocol control chip is implemented by an application-specific integrated circuit (ASIC); its appli...
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