The invention relates to a FF (foundation field)
bus frame type recognizer arranged in a
data link layer of a FF
field bus. The FF
bus frame type recognizer comprises a frame controlled word coding and target address receiving module, an address matching module, and a conversion circuit, wherein the frame controlled word coding and target address receiving module is used for generating frame control information, an address matching result and relevant parameters of a
protocol data unit of the
data link layer based on data signals received from the
field bus and sending the frame control information, the address matching result and the relevant parameters of the
protocol data unit of the
data link layer to an upper
processing unit of the
data link layer; the address matching module is used for carrying out address matching
processing on received address table data in the
data link layer and an address data available indicating
signal received through the conversion circuit and outputting to the upper
processing unit of the
data link layer; and the conversion circuit is used for carrying out timing adjustment on the address data available indicating
signal and sending the adjusted address data available indicating
signal to the address matching module. The invention can extract the type information of a DLPDU (data link
protocol data unit), can identify the long address or the short address of the DLPDU, can extract the address information of the DLPDU, and can be implemented in various
modes of FPGA (
field programmable gate array), CPLD (
complex programmable logic device), IP (
internet protocol) and the like.