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Gallium-adulterated Ga3Sb8Te1 phase change memory unit and its making method

A technology of phase-change storage and phase-change materials, which is applied in the field of gallium-doped Ga3Sb8Te1 phase-change memory cells and its preparation, devices and its preparation. Problems such as storage unit and embedded phase-change storage unit technical solutions are not given, achieving high thermal stability, erasable cycle times, and erased times.

Inactive Publication Date: 2008-01-09
SHANGHAI JIAO TONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There are still many defects in the existing phase change random memory unit, the main problems are: how to further reduce the power consumption of the memory unit, improve the thermal stability and cycle erasing ability of the memory unit
However, this paper does not propose the application of GaSbTe materials to embedded phase-change memory cells, nor does it give specific technical solutions for the application of embedded phase-change memory cells.
In addition to unique optical properties, GaSbTe phase change materials also have special thermal and electrical properties. The search has not found any relevant research and application of GaSbTe phase change materials in the field of embedded phase change RAM

Method used

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  • Gallium-adulterated Ga3Sb8Te1 phase change memory unit and its making method
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  • Gallium-adulterated Ga3Sb8Te1 phase change memory unit and its making method

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Embodiment 1

[0042] The above-mentioned gallium-doped phase-change memory cell based on the present invention, in conjunction with accompanying drawing 5, its preparation steps are as follows:

[0043] The first step is to deposit a layer of lower electrode material TiW on the silicon substrate by magnetron sputtering, with a thickness of 150nm, a melting point of 1750°C, and a thermal conductivity of 1.7J / cm-k-s, as shown in the attached figure 5(a).

[0044] In the second step, a layer of SiO is deposited on the lower electrode material of the first step by CVD (chemical vapor deposition). 2 The insulating dielectric layer has a thickness of 150nm and a thermal conductivity of 0.014J / cm-k-s. Then, through nanoimprint lithography and dry etching technology, a small hole is carved in the center of the insulating dielectric layer, the diameter of the small hole is 20nm, and the depth is 30nm, as shown in Figure 5(b).

[0045] In the third step, the magnetron sputtering method is used to f...

Embodiment 2

[0050] The above-mentioned gallium-doped phase-change memory cell based on the present invention, in conjunction with accompanying drawing 5, its preparation steps are as follows:

[0051] The first step is to deposit a layer of PtW alloy as the lower electrode material on the silicon substrate by magnetron sputtering, with a thickness of 150nm, a melting point of 1800°C, and a thermal conductivity of 2.0J / cm-k-s, as shown in the attached Figure 5(a).

[0052] In the second step, a layer of SiO is deposited on the lower electrode material of the first step by CVD (chemical vapor deposition). 2 The insulating dielectric layer has a thickness of 250nm and a thermal conductivity of 0.014J / cm-k-s. Then, by nanoimprint lithography and dry etching technology, a small hole is carved in the center of the insulating dielectric layer, the diameter of the small hole is 20nm, and the depth is 100nm, as shown in Figure 5(b).

[0053] In the third step, the magnetron sputtering method is ...

Embodiment 3

[0058] The above-mentioned gallium-doped phase-change memory cell based on the present invention, in conjunction with accompanying drawing 5, its preparation steps are as follows:

[0059] The first step is to deposit a layer of lower electrode material TiW on the silicon substrate by magnetron sputtering, with a thickness of 150nm, a melting point of 1780°C, and a thermal conductivity of 1.76J / cm-k-s, as shown in the attached figure 5(a).

[0060] In the second step, a layer of SiO is deposited on the lower electrode material of the first step by evaporation. 2 The dielectric insulating dielectric layer has a thickness of 200nm and a thermal conductivity of 0.014J / cm-k-s. Then, through nanoimprint lithography and dry etching technology, a small hole is carved in the center of the insulating dielectric layer, the diameter of the small hole is 20nm, and the depth is 50nm, as shown in Figure 5(b).

[0061] In the third step, the magnetron sputtering method is used to fill the ...

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Abstract

The invention is concerned with the gallium doping Ga3Sb8Te1 phase change memorizer unit and its making method, belongs to the micro-electronics technique field, it includes: the silicon underlay, the up and down electrode, the heating layer, and the insulating medium layer, the phase change material is the Ga3Sb8Te1, as the sulfur system compound. It is: forming the down electrode by depositing the layer of the down electrode material on the silicon underlay; applying the nanometer coining photolithography and the dry etching technique chisels the small hole on the center of the first insulating medium layer which depositing on the down electrode material; filling up the small hole with the heating layer depositing and conducting the chemical-mechanical polishing; depositing the second insulating medium on the heating layer, then, chiseling the groove on the second insulating medium with same techniques and depositing the layer of Ga3Sb8Te1 phase change material in the groove, conducting the chemical-mechanical polishing; at last, forming the up electrode by depositing the up electrode material. The invention reduces the power consumption of the phase change memorizer unit to 10%.

Description

technical field [0001] The invention relates to a device in the field of microelectronic technology and a preparation method thereof, in particular to a device based on gallium-doped Ga 3 Sb 8 Te 1 Phase-change memory unit and its preparation method. Background technique [0002] Phase change memory (PCM), as the name implies, is a kind of memory that uses the change of material phase to achieve the purpose of information storage. Due to its non-volatility, long cycle life, small component size, low power consumption, multi-level storage, high-speed reading, radiation resistance, high and low temperature resistance, vibration resistance, electronic interference resistance and simple manufacturing process, etc. It is considered to be the most likely to replace the current FLASH and DRAM and become the mainstream product of semiconductor memory in the future. [0003] The embedded phase-change memory array is composed of memory cells, and the memory cells are composed of u...

Claims

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Application Information

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IPC IPC(8): H01L45/00H01L27/24G11C11/56
Inventor 程秀兰尹文顾怀怀
Owner SHANGHAI JIAO TONG UNIV
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