Gamma gate heterojunction field effect transistor and preparation method thereof

Abstract

The invention discloses a gamma gate heterojunction field effect transistor and a fabrication method thereof. The transistor comprises, from bottom to top, a substrate (1), a transition layer (2), a barrier layer (3), a source electrode (4), a drain electrode (5), a passivation layer (6), a gamma gate (8) and a protection layer (10); a groove (7) is opened on the passivation layer (6), wherein, nfloating field plates (9) are deposited on the passivation layer (6) arranged between the gamma gate (8) and drain electrode (5) to form a composite gate field plate structure (n is not less than 1).All the floating field plates have the same size and are mutually independent, and the distance between two adjacent floating field plates increases based on the number of the floating field plates arranged along the direction from the gamma gate to the drain electrode. The n floating field plates are in a floating state and completed together with the gamma gate by one-time process. The transistor has the advantages of simple process, good reliability, strong stability, good frequency characteristic and high output power, and the transistor and the fabrication method can be used for fabricating high-frequency high power devices based on III-V group compound semiconductor heterojunction structure.

Description

technical field [0001] The invention belongs to the field of microelectronics technology, and relates to semiconductor devices, especially a Γ-gate heterojunction field-effect transistor based on the heterojunction structure of III-V compound semiconductor materials, which can be used as a basic device for microwave, millimeter wave communication systems and radar systems . technical background [0002] As is well known in the industry, semiconductor materials composed of group III elements and group V elements, that is, group III-V compound semiconductor materials, such as gallium nitride (GaN)-based, gallium arsenide (GaAs)-based, indium phosphide (InP)-based And other semiconductor materials, their bandgap widths are often quite different, so people usually use these III-V compound semiconductor materials to form various heterojunction structures. Due to the large difference in the band gap of III-V compound semiconductor materials on both sides of the heterojunction int...

AI Technical Summary

Problems solved by technology

However, the manufacturing process of the heterojunction field effect transistor using the stacked field plate structure is relatively complicated. Each additional layer of field plate requires additional process steps such as photolithography, metal deposition, insulating dielectric material deposition, stripping, and cleaning. To make the insulating dielectric material deposited under the field plates of each layer have an appropriate thickness, cumbersome process debugging must be carried out, which greatly increases the difficulty of device manufacturing and reduces the yield of devices.

Another issue worthy of people's attention is that all heterojunction field effect transistors with a gate field plate structure will generate additional capacitance between the gate field plate and the two-dimensional electron gas channel, which will be superimposed into the gate of the device In the feedback capacitance between the drain and the drain, the feedback capacitance of the device increases, resulting in a certain attenuation of the power characteristics and frequency characteristics of the device

In addition, the increase of the feedback capacitance of the device will weaken the isolation between the input and output of the device and reduce the stability of the device

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