Gate stack structure for semiconductor flash memory device and preparation method thereof

Abstract

The invention belongs to the technical field of manufacturing technology of semiconductor integrated circuits, and in particular relates to a gate stack structure for a flash memory device and a preparation method thereof. The gate stack structure comprises an Al2O3 thin film, ruthenium-based nanocrystals, a HfxAlyOz thin film, an Al2O3 thin film and a top electrode layer from bottom to top in turn by taking a silicon slice in P-type (100) crystal orientation as a substrate, wherein the Al2O3 thin film is used as a charge tunneling layer; the ruthenium-based nanocrystals are used as a first charge trapping layer; the HfxAlyOz thin film is used as a second charge trapping layer; and the Al2O3 thin film is used as a charge barrier layer. In the invention, the ruthenium-based nanocrystals have high thermal stability and are difficult to diffuse at a high temperature; the HfxAlyOz thin film has high charge trapping density; and the top electrode is made of metal palladium and has large work function. Thus the gate stack structure has broad application prospect in nanocrystalline memory capacitors.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuit manufacturing, and in particular relates to a capacitor structure and a preparation method of a flash memory, in particular to a novel heterogeneous charge trapping layer based on metal nanocrystals and high dielectric constant media and a preparation method. Background technique [0002] With the continuous development of semiconductor process technology, the integration density of non-volatile flash memory is getting higher and higher, and the operating voltage is getting lower and lower, which drives the continuous reduction of device feature size. After the 65nm technology node, the traditional polysilicon floating gate structure There are a series of problems that greatly affect the performance of device storage, such as slow erasing and writing speed, high operating voltage, etc. [1]. A new generation of non-volatile memory based on discontinuous charge trapping mech...

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Problems solved by technology

However, the disadvantage of this structure memory is that its operating voltage is high and the operating speed is slow [5]

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