Manufacturing method of VC SOI nLDMOS (Vertical Channel Silicon-on-insulator n Lateral Double-diffused Metal Oxide Semiconductor) device unit with p-type buried layer
A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems that are not conducive to improving device and system reliability, saving energy and protecting the environment, affecting device voltage withstand performance, and device working efficiency. Low problems, to achieve the effect of improving work efficiency and thermal stability, improving electrical and thermal properties, and protecting the environment
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[0028] A method for manufacturing a vertical channel SOI nLDMOS device unit with a p-buried layer, specifically comprising the following steps:
[0029] 1. Select a polished SOI wafer with a thick p-type buried layer (BPL) as the initial material. The SOI wafer includes a p-type semiconductor substrate, a thin buried insulating layer, and a p-type buried layer from bottom to top. The p-type semiconductor substrate and the p-type buried layer region are completely isolated by a thin buried insulating layer, and the thin one is the n-type top layer silicon covering the p-type buried layer region for making devices and circuit;
[0030] 2. Perform the first oxidation on the upper surface of the exposed top silicon film, the thickness of the oxide layer is 100-300nm, and then use the designed buffer doping mask to perform the first photolithography on the exposed oxide layer to remove The exposed oxide layer forms a buffer doping window, and n-type impurities are doped in the buf...
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