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TOPCon battery phosphorus diffusion process

A phosphorus diffusion and process technology, applied in the direction of circuits, photovoltaic power generation, electrical components, etc., can solve the problems of difficult to form N/N+ structure field passivation, restrict the conversion efficiency of TOPCon technology, and destroy the integrity of the tunneling oxide layer. Achieve the effects of fewer grain boundaries, improved efficiency, and improved carrier selection

Inactive Publication Date: 2021-12-17
POPSOLAR TECH (XUZHOU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, in the existing preparation process of matching phosphorus doping, high-concentration phosphorus doping: encounter the phenomenon that phosphorus atoms penetrate the tunneling oxide layer, destroying the integrity of the tunneling oxide layer, and weakening the ability of the TOPCon structure to select carriers; low Concentration phosphorus doping: The doping concentration reaching the tunnel oxide layer is relatively light, and it is difficult to form the field passivation effect of the N / N+ structure. Both of the above two points restrict the improvement of the conversion efficiency of TOPCon technology

Method used

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  • TOPCon battery phosphorus diffusion process

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Effect test

Embodiment 1

[0027] A TOPCon battery phosphorus diffusion process, comprising the following steps:

[0028] Step 1: Select N-type silicon wafer as the substrate material, and produce a pyramid-like surface structure on the surface of the silicon wafer by cleaning and texturing;

[0029] Step 2: performing boron diffusion on the front surface of the silicon wafer;

[0030] Step 3: Perform BSG etching and back polishing on the silicon wafer;

[0031] Step 4: Form a tunneling oxide layer on the back of the silicon wafer by nitric acid oxidation, thermal oxidation or LPCVD preparation method, the thickness of the tunneling oxide layer is 1-2nm; and form an amorphous silicon layer on the tunneling oxide layer, the The thickness of the amorphous silicon layer is 100-140nm.

[0032] Step 5: Phosphorus doping is carried out on the amorphous silicon layer on the back side by means of extended temperature rise-constant temperature advancement-cooling advancement, so that the doped amorphous silico...

Embodiment 2

[0041] A TOPCon battery phosphorus diffusion process, comprising the following steps:

[0042] Step 1: Select N-type silicon wafer as the substrate material, and produce a pyramid-like surface structure on the surface of the silicon wafer by cleaning and texturing;

[0043] Step 2: performing boron diffusion on the front surface of the silicon wafer;

[0044] Step 3: Perform BSG etching and back polishing on the silicon wafer;

[0045] Step 4: Form a tunneling oxide layer on the back of the silicon wafer by nitric acid oxidation, thermal oxidation or LPCVD preparation method, the thickness of the tunneling oxide layer is 1-2nm; and form an amorphous silicon layer on the tunneling oxide layer, the The thickness of the amorphous silicon layer is 100-140nm.

[0046] Step 5: Phosphorus doping is carried out on the amorphous silicon layer on the back side by means of extended temperature rise-constant temperature advancement-cooling advancement, so that the doped amorphous silico...

Embodiment 3

[0055] A TOPCon battery phosphorus diffusion process, comprising the following steps:

[0056] Step 1: Select N-type silicon wafer as the substrate material, and produce a pyramid-like surface structure on the surface of the silicon wafer by cleaning and texturing;

[0057] Step 2: performing boron diffusion on the front surface of the silicon wafer;

[0058] Step 3: Perform BSG etching and back polishing on the silicon wafer;

[0059] Step 4: Form a tunneling oxide layer on the back of the silicon wafer by nitric acid oxidation, thermal oxidation or LPCVD preparation method, the thickness of the tunneling oxide layer is 1-2nm; and form an amorphous silicon layer on the tunneling oxide layer, the The thickness of the amorphous silicon layer is 100-140nm.

[0060] Step 5: Phosphorus doping is carried out on the amorphous silicon layer on the back side by means of extended temperature rise-constant temperature advancement-cooling advancement, so that the doped amorphous silico...

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Abstract

The invention provides an excellent TOPCon battery phosphorus diffusion process, which adopts a mode of crystallizing an amorphous silicon layer at a high temperature and then carrying out gradual diffusion propulsion, that is, crystallizing the amorphous silicon layer by prolonging the heating and constant temperature process time before diffusion, carrying out first diffusion + constant temperature propulsion and second diffusion + cooling propulsion after cooling, and carrying out annealing with oxygen. By means of the method, the amorphous silicon layer has a high crystallization proportion, meanwhile, the situation that phosphorus atoms penetrate through the tunneling oxide layer is effectively reduced, polycrystalline silicon has higher electromobility and stable photoelectric performance compared with amorphous silicon, the effect of the tunneling layer is guaranteed, the TOPCon structure formed by the doped amorphous silicon and the tunneling oxide layer enhances the effect of selecting a carrier, and the efficiency of the solar cell is improved.

Description

technical field [0001] The invention relates to the field of solar cell production and manufacturing, in particular to an excellent phosphorus diffusion process for TOPCon cells. Background technique [0002] With the rapid development of photovoltaic technology and continuous development, a variety of high-efficiency cells have also been developed. Among them, TOPCon cells are prepared with an ultra-thin tunnel oxide layer and a layer of highly doped polysilicon thin layer on the back, which together form a passivation The contact structure provides a good surface passivation for the back of the silicon wafer. The ultra-thin oxide layer can allow the multi-carrier electrons to tunnel into the polysilicon layer while blocking the recombination of the minority carrier-holes, and then the electrons are transported laterally in the polysilicon layer and collected by the metal. , thus greatly reducing the metal contact recombination current and increasing the open circuit voltag...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/223H01L31/18H01L21/67
CPCH01L31/1804H01L21/223H01L21/67248Y02E10/547Y02P70/50
Inventor 欧文凯董思敏向亮睿
Owner POPSOLAR TECH (XUZHOU) CO LTD
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