Capacity humidometer
A humidity measurement and capacitive technology, which is applied in the direction of material capacitance, etc., can solve problems such as poor performance, difficulty in accurate measurement, and difficulty in integration, and achieve the effects of simple method and structure, reduced total cost, and high precision
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Embodiment 1
[0016] Embodiment 1: Manufacture 1 of a CMOS-compatible humidity sensor integrated chip.
[0017] Firstly, the sensitive capacitance structure and layout are designed. In order to be compatible with the standard CMOS integrated circuit production process, the heating resistor is realized by P well, the bottom electrode is made of high phosphorus doped silicon layer, and the top electrode is made of heavily doped polycrystalline. The polycrystal is formed together with the gate of the MOS transistor. The dielectric in the middle of the capacitor is a field oxide layer. The whole system is realized by standard P-well CMOS process. After completing the flow of the circuit chip, the entire chip is covered with silicon nitride and glue and opened by photolithography. figure 2 hole on top. Then use the buffered hydrofluoric acid solution commonly used in standard integrated circuit technology to remove the oxide layer under the small hole. In this way, the whole chip is prepare...
Embodiment 2
[0018] Embodiment 2: Manufacture 2 of a CMOS-compatible humidity sensor integrated chip.
[0019] The manufacturing method of the chip is exactly the same as above, and it is a standard CMOS process. The difference is that the composition of the sensitive capacitor structure shown is different from the first one. In this structure, the heating resistor adopts a heavily doped silicon layer. The bottom electrode adopts heavily doped polycrystalline. The poly is formed together with the gate of the MOS transistor. The dielectric in the middle of the capacitor is an oxide layer deposited at low temperature. The upper electrode is made of metal. The whole system can still be realized by P-well CMOS technology. A gold layer is used for the metal leads. After the circuit chip flow is completed, the entire chip is covered with silicon nitride and glue, and the small holes on it are opened by photolithography. Then use the buffered hydrofluoric acid solution commonly used in sta...
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