Process for producing semiconductor nanocrystal cores, core-shell, core-buffer-shell, and multiple layer systems in a non-coordinating solvent utilizing in situ surfactant generation
Patent Information
- Authority / Receiving Office
- US · United States
- Current Assignee / Owner
- THE RES FOUND OF STATE UNIV OF NEW YORK
- Publication Date
- 2007-03-01
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
[0001] This application claims the benefit of U.S. Provisional Patent Application Ser. No. 60 / 456,384, filed Mar. 20, 2003, which is hereby incorporated by reference in its entirety.
[0002] This invention arose out of research sponsored by the U.S. Air Force Office of Scientific Research (AFOSR Grant No. F496200110358) The U.S. Government may have certain rights in this invention.FIELD OF THE INVENTION
[0003] This invention relates to a process for producing III-V or II-VI nanocrystals, core-shell, core-buffer-shell, and multiple layer systems. BACKGROUND OF THE INVENTION
[0004] There is considerable interest in processes for the preparation of semiconductor nanocrystals, the applications for which include, for example, optical communications, photonic chips, photovoltaic devices, and biolabels for bioimaging. Traditional preparative routes to III-V semiconductor nanocrystals require the use of coordination solvents such as trioctylphosphine oxide (“TOPO”) or dodecylamine (“DA”) and ...