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Semiconductor device and its making method

A manufacturing method, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problems of contact resistance increase of contact plugs, and achieve the effect of preventing the decline of contact resistance and inhibiting oxidation

Inactive Publication Date: 2012-05-30
FUJITSU SEMICON MEMORY SOLUTION LTD KANAGAWA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In Patent Document 1 using a contact plug as amorphous silicon, the surface of the contact plug is oxidized by the reduction annealing, and the contact resistance of the contact plug may increase.

Method used

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  • Semiconductor device and its making method
  • Semiconductor device and its making method
  • Semiconductor device and its making method

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Experimental program
Comparison scheme
Effect test

no. 1 approach

[0111] Figure 8 to Figure 13 is a cross-sectional view during the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

[0112] In order to manufacture this semiconductor device, first, carry out the described figure 1 (a) to image 3 (a) process.

[0113] After that, if Figure 8 As shown in (a), the conductive film 24 is formed on the insulating adhesive film 15, inside the first opening 14a, and inside the first hole 11a.

[0114] The conductive film 24 is made of a material that does not easily lose conductivity even after high-temperature annealing in an oxygen atmosphere such as reduction annealing performed later. As such a conductive film 24, there is any one of the following single-layer films, or a laminated film in which at least two of them are laminated: for example, a titanium film, a titanium nitride film, an aluminum titanium nitride film, an iridium film, an oxide Iridium (IrO 2 ) film, platinum f...

no. 2 approach

[0168] Figure 14 is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention. in addition, Figure 14 Components described in the first embodiment are given the same reference numerals as those in the first embodiment, and description thereof will be omitted below.

[0169] In this embodiment, if Figure 14 As shown, the diameter of the first contact plug 26 is larger than that of the second contact plug 13b. The configurations other than those described above are the same as those of the first embodiment.

[0170] Such as image 3 As described in (a), in the case of filling the first hole 11a with the second tungsten film 18, in order to prevent the film from falling off due to the strong stress of tungsten, the diameter of the first hole 11a is reduced, and it is necessary to use a thinner first hole 11a. Two tungsten films 18 are used to form the first holes 11a.

[0171] In contrast, in the first embodiment, as Fig...

no. 3 approach

[0175] Figure 15 to Figure 18 is a cross-sectional view during the manufacturing process of the semiconductor device according to the third embodiment of the present invention. In addition, in these drawings, the same code|symbol as those of these embodiment is attached|subjected to the element demonstrated in 1st, 2nd embodiment, and the description is abbreviate|omitted below.

[0176] In order to manufacture the semiconductor device, first, the above-mentioned figure 1 (a) Cross-sectional structure diagram. After that, if Figure 15 As shown in (a), a photoresist is applied on the first insulating film 11, and it is exposed and developed, thereby forming the first and second source / drain regions 8a, 8b with The first resist pattern 30 of the first and second windows 30a, 30b.

[0177] Afterwards, the first insulating film 11 and the protective insulating film 10 are etched through the above-mentioned first and second windows 30a and 30b to form first and second contact...

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Abstract

Disclosed is a semiconductor device wherein a contact plug, which does not hamper orientation of a lower electrode of a capacitor and is hardly oxidized in an oxygen atmosphere, is arranged directly below the capacitor. Also disclosed is a method for manufacturing such a semiconductor device. Specifically disclosed is a semiconductor device comprising a silicon substrate (1), a first source / drainregion (8a) formed in a surface layer of the silicon substrate (1), a first insulating film (11) having a first hole (11a) on the first source / drain region (8a), a conductive film (24) formed on the inner surface of the first hole (11a), a filling body (25a) which is so formed on the conductive film (24) as to have a thickness enough to fill up the first hole (11a) and as to form a first contact plug (26) together with the conductive film (24) while having an upper surface composed of an amorphous insulating material, and a capacitor Q which is formed on the first contact plug (26) and comprises a lower electrode (21a) electrically connected with the conductive film (24), a capacitor dielectric film (22a) composed of a ferroelectric material, and an upper electrode (23a).

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] Flash memory and ferroelectric memory are known as nonvolatile memories capable of storing information even when power is cut off. [0003] Among them, the flash memory has a floating gate buried in a gate insulating film of an insulated gate type field effect transistor (IGFET), and stores information by storing charges indicating stored information in the floating gate. However, such a flash memory has a disadvantage that, when writing or erasing information, a tunnel current needs to flow to the gate insulating film, and a relatively high voltage is required. [0004] In contrast, the ferroelectric memory is also called FeRAM (Ferroelectric Random Access Memory), and stores information using the hysteresis characteristic of the ferroelectric film of the ferroelectric capacitor. The ferroelectric film is polarized by a voltage applied b...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8246H01L27/105
CPCH01L27/11507H01L21/76877H01L28/75H01L27/11502H01L28/55H01L28/65H10B53/30H10B53/00H01L27/105
Inventor 置田阳一小室玄一
Owner FUJITSU SEMICON MEMORY SOLUTION LTD KANAGAWA