Hetero junction field effect transistor for insulated gate type source field board

A heterojunction field effect, insulated gate type technology, applied in the field of microelectronics, can solve the problems of reducing the yield of the device, complicated manufacturing process, tedious process debugging, etc., to reduce the electric field, improve the breakdown voltage, and enhance the reliability. Effect

Active Publication Date: 2009-04-29
云南凝慧电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the manufacturing process of the heterojunction field effect transistor using the stacked field plate structure is relatively complicated. Each additional layer of field plate requires additional process steps such as photolithography, metal deposition, insulating dielectric material deposition, stripping, and cleaning. To make the insulating dielectric material deposited under the field plates of each layer have an appropriate thickness, cumbersome process debugging must be carried out, which greatly increases the difficulty of device manufacturing and reduces the yield of devices.

Method used

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  • Hetero junction field effect transistor for insulated gate type source field board
  • Hetero junction field effect transistor for insulated gate type source field board
  • Hetero junction field effect transistor for insulated gate type source field board

Examples

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Effect test

Embodiment 1

[0052] The production substrate is sapphire, and the insulating dielectric layer is SiO 2 , the passivation layer is SiN, the protective layer is SiN, and the source field plate and each floating field plate is an insulated gate source field plate heterojunction field effect transistor composed of Ti / Au metal. The process is:

[0053] 1. Epitaxial undoped transition layer 2 with a thickness of 1 μm on the sapphire substrate 1 by metal organic chemical vapor deposition technology, the transition layer is composed of GaN materials with thicknesses of 30 nm and 0.97 μm from bottom to top. The process conditions used for the epitaxial lower GaN material are: temperature 528°C, pressure 60 Torr, hydrogen gas flow rate 4900 sccm, ammonia gas flow rate 4900 sccm, gallium source flow rate 30 μmol / min; the process conditions for the epitaxial upper layer GaN material are: temperature 1020°C, the pressure is 60 Torr, the flow rate of hydrogen gas is 4900 sccm, the flow rate of ammonia g...

Embodiment 2

[0062] The production substrate is silicon carbide, the insulating dielectric layer is SiN, and the passivation layer is SiO 2 , the protective layer is SiO 2 , the source field plate and each floating field plate are Ni / Au metal combined insulated gate type source field plate heterojunction field effect transistor, the process is:

[0063] 1. An undoped transition layer 2 with a thickness of 2.6 μm is epitaxially formed on a silicon carbide substrate 1 by metal-organic chemical vapor deposition technology. Made of GaN material. The process conditions used for the epitaxial lower layer AlN material are: temperature 1010°C, pressure 66 Torr, hydrogen gas flow rate 4600 sccm, ammonia gas flow rate 4600 sccm, aluminum source flow rate 10 μmol / min; the process conditions for the epitaxial upper layer GaN material are: temperature 1010°C, the pressure is 66 Torr, the flow rate of hydrogen gas is 4600 sccm, the flow rate of ammonia gas is 4600 sccm, and the flow rate of gallium so...

Embodiment 3

[0072] The production substrate is silicon, the insulating dielectric layer is SiN, and the passivation layer is Al 2 o 3 , the protective layer is Al 2 o 3 , the source field plate and each floating field plate are Pt / Au metal combined insulated gate type source field plate heterojunction field effect transistor, the process is:

[0073] 1. Using metal organic chemical vapor deposition technology to epitaxially undoped transition layer 2 with a thickness of 5 μm on the silicon substrate 1, the transition layer is composed of AlN material with a thickness of 115 nm and GaN material with a thickness of 4.885 μm from bottom to top constitute. The process conditions used for the epitaxial lower layer AlN material are: temperature 840°C, pressure 70 Torr, hydrogen gas flow rate 4700 sccm, ammonia gas flow rate 4700 sccm, aluminum source flow rate 30 μmol / min; the process conditions for the epitaxial upper layer GaN material are: temperature 1020°C, the pressure is 70 Torr, the...

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Abstract

The invention discloses an insulated gate type source field plate heterojunction field effect transistor. The transistor comprises, from bottom to top, a substrate (1), a transition layer (2), a barrier layer (3), a source electrode (4), a drain electrode (5), an insulating medium layer (6), an insulated gate electrode (7), a passivation layer (8), a source field plate (9) and a protection layer (11); the source field plate (9) is arranged on the passivation layer (8) and is electrically connected with the source electrode (4), wherein, n floating field plates (10) are deposited on the passivation layer (8) along the direction from the source field plate to the drain electrode. The floating field plates have the same size and are mutually independent, and the spacing between two adjacent floating field plates successively increases based on the number of the floating field plates arranged along the direction from the source field plate to the drain electrode. The n floating field plates and the source field plate are completed on the passivation layer by one time process. The transistor has the advantages of simple process, high breakdown voltage and good reliability, and can be used for fabricating high-frequency high-power devices based on an III-V group compound semiconductor material heterojunction structure.

Description

technical field [0001] The invention belongs to the field of microelectronic technology, and relates to semiconductor devices, in particular to an insulated gate type source field plate heterojunction field effect transistor based on a III-V compound semiconductor material heterojunction structure, which can be used as a microwave, millimeter wave communication system and radar The basic components of the system. technical background [0002] As is well known in the industry, semiconductor materials composed of group III elements and group V elements, that is, group III-V compound semiconductor materials, such as gallium nitride (GaN)-based, gallium arsenide (GaAs)-based, indium phosphide (InP)-based And other semiconductor materials, their bandgap widths are often quite different, so people usually use these III-V compound semiconductor materials to form various heterojunction structures. Due to the large difference in the band gap of III-V compound semiconductor materials...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
Inventor 毛维郝跃杨翠过润秋张进成马晓华许晟瑞
Owner 云南凝慧电子科技有限公司
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