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Method for manufacturing SiC MOS capacitor with low interface state density

A technology of interface state density and fabrication method, applied in the field of microelectronics, can solve the problems of high interface state density of MOS capacitors, inability to precisely control the dose, waste of nitrogen-containing gas, etc., to reduce dangling bonds, ease interface stress, and improve speed. Effect

Inactive Publication Date: 2009-09-23
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] (1) NO and N cannot be precisely controlled 2 O gas dosage, and it is easy to cause waste of nitrogen-containing gas;
[0005] (2) The interface state density of MOS capacitors is still high;
[0006] (3) The process is cumbersome and difficult to realize

Method used

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  • Method for manufacturing SiC MOS capacitor with low interface state density

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0019] Embodiment 1, comprises the steps:

[0020] Step 1, cleaning and processing the N-SiC epitaxial material.

[0021] After cleaning the N-SiC epitaxial material ultrasonically with deionized water, wash it with concentrated sulfuric acid, heat it to smoke, cook for 10 minutes, and soak for 30 minutes; then rinse the surface with deionized water several times; then use H 2 O, H 2 o 2 Soak in No. 1 cleaning solution with a ratio of 5:1:1 to ammonia water in an 80°C water bath for 5 minutes, and after cleaning with hydrogen fluoride solution, rinse the surface several times with deionized water; 2 O, H 2 o 2 Soak in No. 2 cleaning solution with a ratio of 6:1:1 to HCl in an 80°C water bath for 5 minutes, and wash with hydrogen fluoride solution, rinse the surface several times with deionized water, and finally dry it with an infrared lamp.

[0022] Step 2, ion implantation and dry oxygen oxidation of SiO 2 TLC.

[0023] 2.1 Perform ion implantation on the epitaxial la...

Embodiment 2

[0034] Embodiment 2, comprises the steps:

[0035] Step 1, cleaning and processing the N-SiC epitaxial material.

[0036] Ultrasonic cleaning of N-SiC epitaxial materials with deionized water, cleaning with concentrated sulfuric acid, heating to smoke, boiling for 10 minutes, soaking for 30 minutes; then rinsing the surface with deionized water several times; then using H 2 O, H 2 o 2 Soak in No. 1 cleaning solution with a ratio of 5:1:1 to ammonia water in an 80°C water bath for 5 minutes, and after cleaning with hydrogen fluoride solution, rinse the surface several times with deionized water; 2 O, H 2 o 2 Soak in No. 2 cleaning solution with a ratio of 6:1:1 to HCl in an 80°C water bath for 5 minutes, and wash with hydrogen fluoride solution, rinse the surface several times with deionized water, and finally dry it with an infrared lamp.

[0037] Step 2, ion implantation and dry oxygen oxidation of SiO 2 TLC.

[0038] 2.1 Perform ion implantation on the epitaxial layer...

Embodiment 3

[0049] Embodiment 3, comprises the steps:

[0050] Step 1, cleaning and processing the N-SiC epitaxial material.

[0051] After cleaning the N-SiC epitaxial material ultrasonically with deionized water, wash it with concentrated sulfuric acid, heat it to smoke, cook for 10 minutes, and soak for 30 minutes; rinse the surface with deionized water several times; then wash it with H 2 O, H 2 o 2 Soak in No. 1 cleaning solution with a ratio of 5:1:1 to ammonia water in an 80°C water bath for 5 minutes, and after cleaning with hydrogen fluoride solution, rinse the surface several times with deionized water; 2 O, H 2 o 2 Soak in No. 2 cleaning solution with a ratio of 6:1:1 to HCl in an 80°C water bath for 5 minutes, and rinse with hydrogen fluoride solution, rinse the surface several times with deionized water, and finally dry it with an infrared lamp.

[0052] Step 2, ion implantation and dry oxygen oxidation of SiO 2 TLC.

[0053] 2.1 Perform ion implantation on the epitaxi...

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Abstract

The invention discloses a method for manufacturing a SiC MOS capacitor with low interface state density, which mainly solves the problem that the trap density of a SiC / SiO2 interface is too high. The method comprises the following manufacturing processes: cleaning an N-SiC epitaxy material; after injecting N<+> ions into an epitaxy layer, oxidizing a layer of SiO2 in the mode of dry-oxygen; sequentially finishing the annealing in Ar gas environment, the wet-oxygen oxidation annealing in wet-oxygen environment and the cold treatment in the Ar gas environment of an oxidized sample wafer; depositing a layer of the SiO2 on the sample wafer after the cold treatment by chemical vapor deposition and annealing the sample wafer in the Ar gas environment; and manufacturing an electrode by sputtering Al in vacuum through a photoetching board and carrying out the annealing in the Ar gas environment so as to finish manufacturing the capacitor. The method has the advantages of accurate control of N<+> doses, low trap intensity of the SiC / SiO2 interface and simple process and can be used for improving the SiC / SiO2 interface characteristics of an N type SiC MOS device.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to the manufacture of semiconductor devices, in particular to a method for manufacturing SiC MOS capacitors. Background technique [0002] SiC material is the only wide bandgap semiconductor that can generate SiO through natural oxidation 2 third-generation semiconductor materials. This third-generation semiconductor SiC has the advantages of wider bandgap, higher breakdown voltage, and higher thermal conductivity than the previous two generations of semiconductors. These advantages can make it work more stably at high temperatures and can be used for high-power applications. Therefore, research on SiC devices and processes has become a hot spot in the field of semiconductor device research. The quality of the oxide layer and its interface properties are important factors affecting the electrical performance of SiC devices. SiC devices usually work under high voltage and hi...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L21/265H01L21/316H01L21/3105
Inventor 郭辉王德龙张玉明张义门程萍张睿张甲阳
Owner XIDIAN UNIV
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