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Method for making integrated silicon on insulator (SOI) laterally diffused metal oxide semiconductor (LDMOS) device with double vertical channels

A vertical and device technology, applied in the field of integrated dual vertical channel SOI LDMOS devices, can solve problems such as unfavorable improvement of device and system reliability, energy saving and environmental protection, low device work efficiency, easy to heat and other problems, and achieve excellent Effects of electrical and thermal properties

Inactive Publication Date: 2011-07-20
SERVICE CENT OF COMMLIZATION OF RES FINDINGS HAIAN COUNTY
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0014] When the vertical channel SOI LDMOS device is turned on, its conductive channel is on the silicon side surface of the vertical gate oxide layer and the top layer semiconductor interface, and is a vertical channel, and the pn junction reverse depletion region formed by the drift region and the well region makes The path of the current in this area becomes narrower, the on-state resistance of the device is large, the on-state voltage drop is high, the on-state current is small, and the on-state power consumption is high, the working efficiency of the device is low, and it is easy to generate heat, which is not conducive to improving the performance of the device and the system. Reliability, energy saving and environmental protection

Method used

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Embodiment Construction

[0031] The method for realizing the SOI CMOS VLSI process of integrating dual vertical channel SOI LDMOS devices specifically includes the following steps:

[0032] 1. Select a polished SOI wafer as the initial material. The SOI wafer is completely isolated into two semiconductor regions by a buried insulating layer, and the thickest one of the two semiconductor regions is P-type. As a substrate, the thin one is N-type as the top silicon film for making devices and circuits;

[0033] 2. Oxidize the surface of the top layer of silicon film for the first time, the thickness of the oxide layer is 50-100nm, deposit silicon nitride on the surface of the oxide layer, the thickness of the silicon nitride layer is 300-500nm, and the oxide layer completely covers the top layer of silicon On the upper surface of the film, the silicon nitride completely covers the upper surface of the oxide layer; the first photolithography is carried out by using the second shallow trench gate area and...

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PUM

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Abstract

The invention relates to a method for making an integrated silicon on insulator (SOI) laterally diffused metal oxide semiconductor (LDMOS) device with double vertical channels. The SOI LDMOS device made by the traditional method does not have a double-vertical-channel structure and an excellent performance corresponding to the double-vertical-channel structure. In the method, a channel etching technology is adopted to realize a double-vertical-groove grid electrode structure and a stepped-groove drain electrode structure, pit doping is replaced by a reverse doping distributed ion implantationpit ohmic contact doping technology, and a grid electrode and a drain electrode are simultaneously doped when an n+ source area is doped. By adopting the traditional SOI complementary metal-oxide-semiconductor transistor (CMOS) very large scale integrated circuits (VLSI) process technology under the condition of slightly increasing the process complexity and the cost, the integrated power and the electric and thermal performance of the SOI LDMOS device can be obviously improved so as to be beneficial to saving of resources and energy sources and protection on the environment.

Description

technical field [0001] The invention belongs to the field of microelectronic technology, and relates to a SOI (semiconductor on insulating layer) CMOS (complementary Metal-oxide-semiconductor) VLSI (Very Large Scale Integration) integrated fabrication method. Background technique [0002] The vertical channel SOI LDMOS device is used as a contactless Power electronic switches, power drivers, or RF power amplifier transistors are widely used in technical fields such as intelligent power electronics, high-temperature environment power electronics, space power electronics, vehicle power electronics, and communications. SOI CMOS VLSI process technology has advantages such as high process maturity, good dielectric isolation performance, simple isolation process, easy three-dimensional integration, easy integration of micro-optical electromechanical and power and radio frequency monolithic systems, and easy improvement of integration density and integration performance. VLSI man...

Claims

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Application Information

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IPC IPC(8): H01L21/8238H01L21/762H01L21/336
Inventor 张海鹏许生根陈波李浩
Owner SERVICE CENT OF COMMLIZATION OF RES FINDINGS HAIAN COUNTY
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