Method for making integrated silicon on insulator (SOI) laterally diffused metal oxide semiconductor (LDMOS) device with double vertical channels

Abstract

The invention relates to a method for making an integrated silicon on insulator (SOI) laterally diffused metal oxide semiconductor (LDMOS) device with double vertical channels. The SOI LDMOS device made by the traditional method does not have a double-vertical-channel structure and an excellent performance corresponding to the double-vertical-channel structure. In the method, a channel etching technology is adopted to realize a double-vertical-groove grid electrode structure and a stepped-groove drain electrode structure, pit doping is replaced by a reverse doping distributed ion implantationpit ohmic contact doping technology, and a grid electrode and a drain electrode are simultaneously doped when an n+ source area is doped. By adopting the traditional SOI complementary metal-oxide-semiconductor transistor (CMOS) very large scale integrated circuits (VLSI) process technology under the condition of slightly increasing the process complexity and the cost, the integrated power and the electric and thermal performance of the SOI LDMOS device can be obviously improved so as to be beneficial to saving of resources and energy sources and protection on the environment.

Description

technical field [0001] The invention belongs to the field of microelectronic technology, and relates to a SOI (semiconductor on insulating layer) CMOS (complementary Metal-oxide-semiconductor) VLSI (Very Large Scale Integration) integrated fabrication method. Background technique [0002] The vertical channel SOI LDMOS device is used as a contactless Power electronic switches, power drivers, or RF power amplifier transistors are widely used in technical fields such as intelligent power electronics, high-temperature environment power electronics, space power electronics, vehicle power electronics, and communications. SOI CMOS VLSI process technology has advantages such as high process maturity, good dielectric isolation performance, simple isolation process, easy three-dimensional integration, easy integration of micro-optical electromechanical and power and radio frequency monolithic systems, and easy improvement of integration density and integration performance. VLSI man...

AI Technical Summary

Problems solved by technology

[0014] When the vertical channel SOI LDMOS device is turned on, its conductive channel is on the silicon side surface of the vertical gate oxide layer and the top layer semiconductor interface, and is a vertical channel, and the pn junction reverse depletion region formed by the drift region and the well region makes The path of the current in this area becomes narrower,