Structure of radiation-resistant MOS (Metal Oxide Semiconductor) device based on partially-consumed type SOI (Silicon-On-Insulator) process

A MOS device, depletion-mode technology, applied in electric solid-state devices, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as defects and substrate damage, reduce junction depth, reduce impact, and improve The effect of radiation resistance
CN102347367AActive Publication Date: 2012-02-0858TH RES INST OF CETC
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
58TH RES INST OF CETC
Publication Date
2012-02-08

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Abstract

The invention relates to a structure of a radiation-resistant MOS (Metal Oxide Semiconductor) device based on a partially-consumed type SOI (Silicon-On-Insulator) process. The structure comprises an SOI substrate and the SOI substrate comprises a silicon film; the upper part of the silicon film is etched with a groove and first isolation layers grow on the side wall and the bottom of the groove; the first isolation layers are etched to form a growing window corresponding to a central region which is located at the bottom part of the groove, mono-crystalline silicon grows in the groove through the growing window and the mono-crystalline silicon grows to cover the corresponding first isolation layers; a grid region is arranged on the central region of the mono-crystalline silicon; and a source region and a drain region are respectively formed in the mono-crystalline silicon corresponding to two sides of the grid region. With the adoption of the first isolation layers provided by the invention, the influence of a threshold voltage shift of a back grid and an opening effect of the back grid on a front grid, which is caused by that a buried oxidation layer is influenced by a total dosage effect, is eliminated; meanwhile, the junction depths of the source region and the drain region of the MOS device are also reduced so that the influence of single event effects on the MOS device is reduced and the radiation-resistant capability of the device is further improved. The structure provided by the invention has the advantages of compact structure, improved radiation-resistant capability, and safety and reliability.
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Description

technical field

[0001] The invention relates to a radiation-resistant MOS device structure, in particular to a radiation-resistant MOS device structure based on a partially depleted SOI process. Background technique

[0002] SOI (Silicon-On-Insulator) technology refers to the material preparation technology of forming a single crystal semiconductor silicon thin film layer with a certain thickness on the insulating layer and the process technology of manufacturing semiconductor devices on the thin film layer. This technology can achieve complete dielectric isolation. Compared with bulk silicon devices isolated by P-N junctions, it has the advantages of no latch, high speed, low power consumption, high integration, high temperature resistance, and radiation resistance.

[0003] According to the thickness of SOI silicon film, SOI devices can be divided into thick film devices and thin film devices. For thick-film SOI devices, when the thickness of the SOI silicon film is great...

Claims

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