SOI (Silicon On Insulator)-BJT (Bipolar Junction Transistor) Bi CMOS (Complementary Metal-Oxide-Semiconductor) integrated device with strain SiGe clip-shaped channel and preparation method thereof

Abstract

The invention discloses a preparation method of an SOI (Silicon On Insulator)-BJT (Bipolar Junction Transistor) Bi CMOS (Complementary Metal-Oxide-Semiconductor) integrated device with a strain SiGe clip-shaped channel and a circuit. The preparation process is as follows: preparing a buried layer on an SOI (Silicon On Insulator) substrate sheet, growing an N type Si epitaxy, preparing a deep-trench isolator, and manufacturing a conventional Si bipolar transistor in the bipolar device region; respectively and continuously growing an N type Si epitaxial layer, an N type strain SiGe layer and the like on the active regions of a substrate NMOS (N-Channel Metal Oxide Semiconductor) device and a substrate PMOS (P-Channel Metal Oxide Semiconductor) device at 600 DEG C-780 DEG C, and respectively preparing a drain electrode, a grid electrode and a source region on the active region of the NMOS device to prepare the NMOS device; depositing SiO2 and Poly-Si on the active region of the PMOS device to prepare a virtual grid electrode, depositing a medium layer to form a grid wall, injecting to form the source electrode and the drain electrode of the PMOS device; etching a virtual grid, depositing SiON and W-TiN to be respectively taken as a grid medium and a composite metal grid to prepare the PMOS device, and thus forming a Bi CMOS circuit. According to the preparation method, the characteristic that the electronic mobility of strain SiGe material in the vertical direction and the hole mobility of the strain SiGe material in the horizontal direction are higher than those of relaxation Si is utilized, and the SOI-BJT Bi CMOS integrated device with the strain SiGe clip-shaped channel and the circuit, which are enhanced in strength, are manufactured by a low-temperature process.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to an SOI BJT, a strained SiGe back channel BiCMOS integrated device and a preparation method. Background technique [0002] Semiconductor integrated circuits are the foundation of the electronics industry. People's huge demand for the electronics industry has prompted the rapid development of this field; in the past few decades, the rapid development of the electronics industry has had a huge impact on social development and national economy; At present, the electronics industry has become the largest industry in the world, occupying a large share in the global market, and its output value has exceeded 1 trillion US dollars. [0003] Si CMOS integrated circuits have the advantages of low power consumption, high integration, low noise and high reliability, and occupy a dominant position in the semiconductor integrated circuit industry; however, ...

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Problems solved by technology

[0005] As the feature size of the device enters the sub-50nm stage, many difficulties are encountered in the research process of the strained Si / SiGe CMOS planar structure: short channel effects, hot carrier effects, etc. make the device size unable to be further reduced; gate oxidation The thinning of the layer thickness leads to the breakdown of the oxide layer, and the tunneling current causes the threshold voltage to drift; the polysilicon depletion effect and the resistance of the polysilicon have an increasing influence on the threshold voltage, etc., all of which make the device and circuit performance unable to continue according to Moore. As the law of development continues to develop, it becomes more important to study devices with new structures.

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