Thin film transistor and manufacturing method thereof
A technology of thin film transistors and crystals, which is used in the manufacture of transistors, semiconductor/solid-state devices, electrical components, etc., can solve the problems of poor large area uniformity, low mobility, and can not meet the driving requirements of flat panel display, so as to prevent the characteristics of the device from changing. Poor, improve the effect of imaging
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[0032] Preparation method of etch barrier layer 7
[0033] 1) Put 1.32g of epoxy acrylate, 6g of urethane acrylate, 4g of methyl methacrylate, 6g of butyl acrylate and 2g of hydroxyethyl acrylate into a glass container.
[0034] 2) Add absolute ethanol for mixing, and mechanically stir for 5 minutes.
[0035] 3) Using a press plate, preheat it to 20-25 degrees Celsius, uniformly coat the base material on the press plate with mechanical stirring, and cool naturally to prepare an etching barrier film.
[0036] Preparation method of passivation layer 8
[0037] 1) Put 3g of benzoin ethyl ether, 1g of benzophenone and 0.5g of triethanolamine into a container, add absolute ethanol and mechanically stir for 3 minutes.
[0038] 2) Add 0.5g of leveling agent into the container, mix by manual stirring, and heat to 25 degrees Celsius at the same time.
[0039] 3) Add 1 g of photosensitizer and keep stirring until it is in a saturated state to obtain a flowing liquid for the passivati...
Embodiment 1
[0041] A thin film transistor, comprising a substrate 1, a gate 2, a gate dielectric layer 3, an active layer 4, a drain 5, a source 6, an etching stopper layer 7, a passivation layer 8, a base 9, and a crystal grid 10 , a microlens 11 and a reflector 12, the gate 2 is arranged in the middle of the top of the substrate 1, the gate dielectric layer 3 is superimposed on both sides of the bottom of the substrate 1 and the top of the gate 2, and the bottom of the active layer 4 Overlaid with the top of the gate dielectric layer 3, the drain 5 and the source 6 are respectively located on both sides of the top of the active layer 4, the etch stop layer 7 is located in the middle of the top of the active layer 4, and the etch stop layer 7 The two sides of the top overlap with the bottom of the opposite side of the drain 5 and the source 6 respectively, the passivation layer 8 and the tops of the drain 5 and the source 6 form a covering state, and the base 9 is located in the middle of...
Embodiment 2
[0054] A thin film transistor, comprising a substrate 1, a gate 2, a gate dielectric layer 3, an active layer 4, a drain 5, a source 6, an etching stopper layer 7, a passivation layer 8, a base 9, and a crystal grid 10 , a microlens 11 and a reflector 12, the gate 2 is arranged in the middle of the top of the substrate 1, the gate dielectric layer 3 is superimposed on both sides of the bottom of the substrate 1 and the top of the gate 2, and the bottom of the active layer 4 Overlaid with the top of the gate dielectric layer 3, the drain 5 and the source 6 are respectively located on both sides of the top of the active layer 4, the etch stop layer 7 is located in the middle of the top of the active layer 4, and the etch stop layer 7 The two sides of the top overlap with the bottom of the opposite side of the drain 5 and the source 6 respectively, the passivation layer 8 and the tops of the drain 5 and the source 6 form a covering state, and the base 9 is located in the middle of...
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