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Strained gallium oxide mosfet device structure and fabrication method

A gallium oxide and strain-type technology, applied in the field of microelectronics, can solve the problems that the limitation of material carrier mobility has not been improved, the influence of device output characteristics, and the difficulty of improving the ohmic contact characteristics of gallium oxide devices, etc., to improve the output characteristics , easy ohmic contact, and the effect of reducing series resistance

Active Publication Date: 2020-09-08
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The conventional gallium oxide MOSFET device structure is as figure 1 As shown, the device achieves n-type doping of the material by silicon ion implantation on the epitaxial material. The source, drain and channel regions are gallium oxide epitaxial layers with different doping concentrations, and the limitation of the carrier mobility of the material has not been improved. Lower carrier mobility still limits the output current of the device
In addition, the ohmic contact characteristics of gallium oxide devices are difficult to improve, which will also affect the output characteristics of the device

Method used

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  • Strained gallium oxide mosfet device structure and fabrication method
  • Strained gallium oxide mosfet device structure and fabrication method
  • Strained gallium oxide mosfet device structure and fabrication method

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Experimental program
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Effect test

Embodiment 1

[0042] Embodiment 1, fabricating a strained gallium oxide field effect transistor in which the heavily doped source region 3 and the heavily doped drain region 4 are made of GaN, and the distance between the two regions is 10 nm.

[0043] Step 1, substrate cleaning.

[0044] Ga 2 o 3 The substrate was cleaned with acetone and isopropanol solutions for 60s, rinsed with deionized water, and finally dried with high-purity nitrogen;

[0045] Step 2, Ga 2 o 3 epitaxial growth, such as image 3 (a) shown.

[0046] Put the cleaned substrate into the MOCVD equipment at the TMGa flow rate of 6.0×10 -6 mol / min, O 2 The flow rate is 2.2×10- 2 Ga 2 o 3 epitaxial layer.

[0047] Step 3, epitaxy cleaning.

[0048] Ga 2 o 3 After the epitaxial material is washed with organic solvent and deionized water in sequence, it is placed in a volume ratio of HF:H 2 Corroded in the solution of O=1:1 for 60s, and finally cleaned with flowing deionized water and dried with high-purity nitr...

Embodiment 2

[0071] Embodiment 2, fabricating a strained gallium oxide field effect transistor in which the heavily doped source region 3 and the heavily doped drain region 4 are made of AlN, and the distance between the two regions is 50 nm.

[0072] Step 1, substrate cleaning.

[0073] Clean the sapphire substrate with acetone and isopropanol solutions for 60s, rinse with deionized water, and finally blow dry with high-purity nitrogen;

[0074] Step two, Ga 2 o 3 epitaxial growth, such as image 3 (a) shown.

[0075] Put the cleaned substrate into MOCVD equipment to grow Ga with a thickness of 200nm 2 o 3 Epitaxial layer, the process conditions are as follows:

[0076] TMGa flow is 6.0×10 -6 mol / min, O 2 The flow rate is 2.2×10 -2 mol / min, the temperature is 850°C, and the pressure is 500Pa.

[0077] Step three, epitaxy cleaning.

[0078] The specific implementation of this step is the same as step 3 of embodiment 1.

[0079] Step 4, source and drain regions are etched, such ...

Embodiment 3

[0103] Embodiment 3, manufacturing a strained gallium oxide field effect transistor in which the heavily doped source region 3 and the heavily doped drain region 4 are made of GaN, and the distance between the two regions is 100 nm.

[0104] Step A, cleaning the substrate.

[0105] Wash the MgO substrate with acetone and isopropanol solutions for 60s, rinse with deionized water, and finally blow dry with high-purity nitrogen;

[0106] Step B, Ga 2 o 3 epitaxial growth, such as image 3 (a) shown.

[0107] Put the cleaned substrate into MOCVD equipment to grow Ga with a thickness of 500nm 2 o 3 Epitaxial layer, the process conditions are: TMGa flow rate is 6.0×10 -6 mol / min, O 2 The flow rate is 2.2×10 -2 mol / min, the temperature is 850°C, and the pressure is 500Pa.

[0108] Step C, epitaxial cleaning.

[0109] The specific implementation of this step is the same as step 3 of embodiment 1.

[0110] Step D, source and drain regions are etched, such as image 3 (b) sh...

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Abstract

The invention discloses a strain type gallium oxide MOSFET device. The strain type gallium oxide MOSFET device comprises a substrate (1), an n-type Ga2O3 conductive channel layer (2), a heavily-dopedsource region (3), a heavily-doped drain region (4), a source electrode (5), a drain electrode (6), an insulated gate medium (7) and a gate electrode (8). The heavily-doped source region and the heavily-doped drain region are both made of n+GaN materials smaller than 500nm in thickness and larger than 1*1019cm <-3> in doping concentration. The spacing between the two regions is smaller than 100 nm. The n-type Ga2O3 conductive channel layer, the heavily-doped source region and the heavily-doped drain region are positioned on the substrate. The source electrode and the drain electrode are respectively positioned on the heavily-doped source region and the heavily-doped drain region. According to the invention, the insulated gate medium is positioned on the n-type Ga2O3 conductive channel layer. The gate electrode is positioned on the insulated gate medium. The mobility of electrons in the conductive channel is improved, and the output characteristic of the device is improved. The device can be used for manufacturing high-voltage, high-frequency and high-power devices.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a gallium oxide metal-oxide-semiconductor field effect transistor MOSFET, which can be used to manufacture high-voltage, high-frequency and high-power devices. Background technique [0002] With the continuous reduction of the size of MOSFET devices, traditional silicon MOS devices have encountered many challenges. Under the conditions of high temperature, high power, high voltage, high frequency and radiation resistance, silicon materials have been difficult to meet the requirements of device performance. Ga 2 o 3 Compared with the third-generation semiconductor materials represented by SiC and GaN, it has a wider forbidden band width, and the breakdown field strength is equivalent to more than 20 times that of Si, and more than 2 times that of SiC and GaN. When manufacturing MOSFET power devices with the same withstand voltage, the on-resistance of the de...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/08H01L29/20H01L29/207H01L29/417H01L21/336
CPCH01L29/086H01L29/0878H01L29/2003H01L29/207H01L29/4175H01L29/66568H01L29/78
Inventor 冯倩田旭升张进成周弘张春福
Owner XIDIAN UNIV