Check patentability & draft patents in minutes with Patsnap Eureka AI!

A kind of high linearity compound gate structure gan transistor device and preparation method thereof

A high linearity, transistor technology, applied in the field of microelectronics, can solve the problems of poor performance, low current driving ability, poor gate control ability, etc., to reduce off-state leakage current, large current driving ability, and reduce static power consumption. Effect

Active Publication Date: 2022-07-22
XIDIAN UNIV
View PDF7 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, conventional multi-channel devices or nano-channel three-dimensional gate structure devices have poor gate control capability, low current drive capability, and poor linearity performance. Therefore, it is necessary to provide a large Current drive capability, improve the linear operating characteristics of the device, GaN transistor devices that meet the application requirements of GaN-based electronic devices in the field of communication, such as high linearity, high power density, high frequency and high bandwidth

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of high linearity compound gate structure gan transistor device and preparation method thereof
  • A kind of high linearity compound gate structure gan transistor device and preparation method thereof
  • A kind of high linearity compound gate structure gan transistor device and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0048] Please refer to Figure 1-Figure 3 , figure 1 It is a cross-sectional schematic diagram of the outer gate length direction of the gate fin of a GaN transistor device with a high linearity compound gate structure provided by an embodiment of the present invention; figure 2 It is a schematic cross-sectional view of the gate width direction of a GaN transistor device with a high linearity compound gate structure provided by an embodiment of the present invention; image 3 It is a cross-sectional schematic diagram of the internal gate length direction of the gate fin of a GaN transistor device with a high linearity compound gate structure provided by an embodiment of the present invention. As shown in the figure, the high linearity compound gate structure GaN transistor device of this embodiment includes:

[0049] Substrate layer 1;

[0050] a plurality of channel layers, and a plurality of the channel layers are sequentially stacked on the substrate layer 1;

[0051]g...

Embodiment 2

[0065] In this embodiment, a GaN transistor device with a double-channel layer high linearity compound gate structure is used as an example to illustrate the fabrication method thereof. See Figures 4a-4i , Figures 4a-4i It is a schematic process flow diagram of a GaN transistor device with a high linearity compound gate structure provided by an embodiment of the present invention, and the preparation method includes the following steps:

[0066] Step 1: Select sapphire or SiC as substrate layer 1, see Figure 4a ;

[0067] Step 2: On the sapphire substrate or the SiC substrate layer 1, a GaN buffer layer and an AlGaN barrier layer are grown to form an AlGaN / GaN heterojunction as a channel layer, wherein the thickness of the AlGaN layer is 15-25 nm, and the mole of A The score is 25-35%, see Figure 4b ;

[0068] Step 3: Repeat Step 2 to form a double channel layer, see Figure 4c ;

[0069] Step 4: Set up active area mesa isolation on the dual channel layer, see Fig...

Embodiment 3

[0079] In this embodiment, the specific process flow of the preparation method of the second embodiment is described in detail by taking different AlGaN barrier layer thicknesses and different Al compositions as examples.

[0080] 1. The AlGaN barrier layer thickness is 15nm of the double channel layer, in which the Al composition is 35%. The specific preparation steps are as follows:

[0081] Step 1. Epitaxial Material Growth

[0082] 1.1) On the SiC substrate, use the MOCVD process to grow the GaN buffer layer;

[0083] 1.2) On the GaN buffer layer, grow a 15nm thick AlGaN barrier layer, wherein the Al composition is 35%, and form a two-dimensional electron gas 2DEG at the contact position between the GaN buffer layer and the AlGaN barrier layer;

[0084] 1.3) A second layer of 10nm thick GaN buffer layer is grown on the first layer of AlGaN barrier layer;

[0085] 1.4) A second layer of AlGaN barrier layer with a thickness of 15 nm is grown on the second layer of GaN buff...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
widthaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention relates to a GaN transistor device with a high linearity compound gate structure and a preparation method thereof, wherein the GaN transistor device comprises: a substrate layer; a plurality of channel layers, and a plurality of the channel layers are sequentially stacked on the substrate layer upper; gate, arranged on both sides and top of several of the channel layers, and at the middle position of the GaN transistor device, and at least the lowermost channel layer is not arranged on both sides of the gate a source electrode, disposed on the plurality of channel layers and located at a position close to one side of the GaN transistor device; a drain electrode, disposed on the plurality of channel layers and located on the side of the GaN transistor device near the other side. The GaN transistor device of the present invention has large current driving capability, high linearity and low static power consumption.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a GaN transistor device with a high linearity compound gate structure and a preparation method thereof. Background technique [0002] In recent years, the third-generation wide-bandgap semiconductors represented by SiC and GaN are widely used due to their large band gap, high breakdown electric field, high thermal conductivity, high saturation electron velocity and high 2DEG concentration at the heterojunction interface. focus on. In theory, devices such as high electron mobility transistor HEMT, light emitting diode LED, and laser diode LD made of these materials have obvious superior characteristics than existing devices. [0003] Relying on the high concentration of two-dimensional electron gas formed by AlGaN / GaN heterojunction, GaN material has obvious superior characteristics than existing Si MOSFET devices in terms of large current and high frequency....

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/20H01L29/423H01L21/336H01L29/78
CPCH01L29/2003H01L29/42356H01L29/78H01L29/66477
Inventor 王冲李昂马晓华郑雪峰刘凯赵垚澎何云龙郝跃
Owner XIDIAN UNIV
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com