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Production method for copper wiring diffusion blocking layer

A manufacturing method and barrier layer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as copper diffusion, poor adhesion of dielectric layers, and prone to reliability problems

Inactive Publication Date: 2009-01-14
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above-mentioned sputtered tantalum nitride cannot form an ionized state, so it cannot form a guided deposition under the substrate bias, so the diffusion barrier layer prepared by the above-mentioned ordinary physical sputtering method is easy to form at the entrance of the contact hole such as figure 1 The overhang 1 shown is easy to form when the plug is made in the contact hole later as figure 2 Void 2 shown, which will affect the performance of semiconductor devices
[0004] If the tantalum nitride / tantalum film prepared at the same time has a high degree of crystallization, copper diffusion channels will be formed at the grain boundaries, resulting in serious copper diffusion.
[0005] Traditional copper interconnection uses a tantalum nitride / tantalum double-layer film barrier layer, which has poor adhesion to the dielectric layer and is prone to reliability problems
[0006] In order to overcome the above-mentioned problems encountered in the tantalum nitride film prepared by the common physical sputtering method, metal oxide chemical vapor deposition (MOCVD) can be used to make a tantalum nitride film with good physical morphology, but the metal The equipment and raw materials used in oxide chemical vapor deposition are very expensive, and its production capacity is low, which cannot meet the needs of large-scale industrial production

Method used

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  • Production method for copper wiring diffusion blocking layer
  • Production method for copper wiring diffusion blocking layer
  • Production method for copper wiring diffusion blocking layer

Examples

Experimental program
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Effect test

Embodiment 1

[0033] like Figure 4 Shown is a schematic diagram of the structure of the diffusion barrier layer prepared in the present invention. like image 3 Shown, the present invention is applied to the manufacture method of copper interconnection diffusion barrier layer:

[0034] In the early stage, a dielectric layer 2 (such as an oxide film) for interlayer insulation is deposited on a semiconductor substrate 1 (such as a silicon substrate). Next, metal trenches or contact holes or via holes 4 are formed by photolithography and etching processes.

[0035] Start the first step S1: deposit the first tantalum film 31 in the metal trench 4 or in the contact hole 4 or in the through hole 4 and on the dielectric layer 2 for interlayer insulation. In this embodiment, the first tantalum film 31 may be deposited by a metal ionization sputtering method. Of course, the first tantalum film 31 can also be deposited by ordinary physical sputtering method, and then the first tantalum film 31 i...

Embodiment 2

[0040] The difference from Embodiment 1 lies in that: in the second step S2 , the first tantalum film 31 is nitrided to form a layer of tantalum nitride film 32 on the surface of the first tantalum film 31 . In this embodiment, the on-line nitrogen plasma nitriding treatment is performed in the same process chamber as in the first step S1, the treatment temperature is 150 degrees Celsius, and the nitrogen ions are formed on the semiconductor substrate 1. Bias voltage; after that, an inert gas plasma can be used to treat the tantalum nitride film 32 to further increase the step coverage of the bottom corner area of ​​the metal trench, via hole or contact hole 4 . Then continue to the third step S3.

[0041] In the third step S3, an in-line annealing treatment is performed. In this embodiment, the annealing temperature is 400 degrees Celsius, the processing time is less than 1 minute, and the annealing is performed in the same process chamber as the first step S1.

Embodiment 3

[0043] The difference from Embodiment 1 is that: in the second step S2 , the first tantalum film 31 is subjected to nitriding treatment to form a tantalum nitride film 32 on the surface of the first tantalum film 31 . In this embodiment, the on-line nitrogen plasma nitriding treatment is performed in the same process chamber as in the first step S1, the treatment temperature is 100 degrees Celsius, and an AC voltage of a certain frequency is applied on the semiconductor substrate 1 to form a Nitrogen ions are subjected to a directional bias; then the tantalum nitride film 32 can be treated with an inert gas plasma to further increase the step coverage of the bottom corner area of ​​the metal trench, via hole or contact hole 4 . Then continue to the third step S3.

[0044] In the third step S3, an in-line annealing treatment is performed. In this embodiment, the annealing temperature is 100 degrees Celsius, the processing time is less than 1 minute, and the annealing is perfor...

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Abstract

The invention relates to the field of semiconductor manufacture, in particular to a manufacture method applied to a copper interconnection diffusion blocking layer. The invention discloses the manufacture method applied to the copper interconnection diffusion blocking layer; a metal channel, a contact hole or a through hole are formed on a medium layer of a semiconductor substrate. The method of the invention comprises the steps as follows: firstly, a first metal film is deposited in the trough of the metal channel or the hole of the contact hole or the hole of the through hole and on the medium layer; subsequently, a nitride film is generated on the surface of the first metal film; finally, a second metal film is deposited on the surface of the nitride film. The blocking layer applied to the copper interconnection diffusion and prepared by the method can improve the sidestep covering characteristic, reinforce the adhesion of the diffusion blocking layer and the medium, form the diffusion blocking layer which has better physical appearance and excellent blocking effect and can be applied to the copper interconnection, avoid the pore generation of the subsequent copper process, and effectively improve the performance and reliability of the chip.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a copper interconnection diffusion barrier layer. Background technique [0002] With the rapid development of CMOS technology according to Moore's law, interconnection delay gradually replaces device delay as the key factor affecting chip performance, and copper interconnection gradually replaces traditional aluminum interconnection and becomes the mainstream of the industry. Copper has a high diffusion coefficient in the medium. Once it diffuses into the active area of ​​the device, it will cause deterioration of device characteristics and junction leakage; and if the copper at the interconnection level diffuses into the medium, it will cause serious leakage. Therefore, the performance of the copper interconnection diffusion barrier layer will greatly affect the performance and reliability of the chip. [0003] Tantalum nitride (TaN) / tantalu...

Claims

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Application Information

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IPC IPC(8): H01L21/768
Inventor 康晓旭
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT