Groove insulated gate type source-leakage composite field plate transistor with high electron mobility

A technology with high electron mobility and insulated gate type, which is applied in the field of microelectronics, can solve the problems of reducing device yield, increasing device difficulty, and complicated manufacturing process, so as to improve breakdown voltage, reduce gate leakage current, and enhance reliability effect

Inactive Publication Date: 2009-04-22
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the manufacturing process of the high electron mobility transistor using the stacked field plate structure is relatively complicated. Each additional layer of field plate requires additional process steps such as photolithography, metal deposition, insulating dielectric material depositi

Method used

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  • Groove insulated gate type source-leakage composite field plate transistor with high electron mobility
  • Groove insulated gate type source-leakage composite field plate transistor with high electron mobility
  • Groove insulated gate type source-leakage composite field plate transistor with high electron mobility

Examples

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Example Embodiment

[0060] Example one

[0061] The substrate is sapphire, and the insulating dielectric layer is SiO 2 , The passivation layer is SiN, the protective layer is SiN, the source field plate, drain field plate and each floating field plate are source-drain composite field plate high electron mobility transistors with Ti / Au metal combination. The process is:

[0062] 1. Using metal-organic chemical vapor deposition technology to epitaxially an undoped transition layer 2 with a thickness of 1 μm on a sapphire substrate 1. The transition layer consists of AlN material with a thickness of 33 nm and a GaN material with a thickness of 0.967 μm from the bottom up constitute. The process conditions used for the epitaxial lower layer of AlN material are: temperature of 590℃, pressure of 160 Torr, hydrogen flow rate of 4700 sccm, ammonia flow rate of 4700 sccm, and aluminum source flow rate of 35 μmol / min; the process conditions used for epitaxial upper layer GaN material are: temperature 1050°C, ...

Example Embodiment

[0071] Example two

[0072] The production substrate is silicon carbide, the insulating dielectric layer is SiN, and the passivation layer is SiO 2 , The protective layer is SiO 2 , The source field plate, drain field plate and each floating field plate are source-drain composite field plate high electron mobility transistors composed of Ni / Au metal. The process is:

[0073] 1. Using metal-organic chemical vapor deposition technology to epitaxially an undoped transition layer 2 with a thickness of 2.1 μm on a silicon carbide substrate 1. The transition layer consists of an AlN material with a thickness of 50 nm and a thickness of 2.05 μm from the bottom up. Made of GaN material. The process conditions used for the epitaxial lower layer AlN material are: temperature of 1020℃, pressure of 165 Torr, hydrogen flow rate of 4800 sccm, ammonia flow rate of 4800 sccm, and aluminum source flow rate of 12 μmol / min; the process conditions of epitaxial upper layer GaN material are: temperatur...

Example Embodiment

[0082] Example three

[0083] The production substrate is silicon, and the insulating dielectric layer is Al 2 O 3 , The passivation layer is SiN, the protective layer is SiN, the source field plate, the drain field plate and the floating field plates are Pt / Au metal combination source-drain composite field plate high electron mobility transistors. The process is:

[0084] 1. Using metal-organic chemical vapor deposition technology to epitaxially an undoped transition layer 2 with a thickness of 5μm on a silicon substrate 1. The transition layer consists of an AlN material with a thickness of 125nm and a GaN material with a thickness of 4.875μm from the bottom up constitute. The process conditions used for the epitaxial lower layer AlN material are: the temperature is 860℃, the pressure is 170 Torr, the hydrogen flow rate is 4900 sccm, the ammonia flow rate is 4900 sccm, and the aluminum source flow rate is 35 μmol / min; the process conditions used for the epitaxial upper layer GaN...

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Abstract

The invention discloses a groove-insulated gate type source-drain composite field plate transistor with high electron mobility. The transistor comprises, from bottom to top, a substrate (1), a transition layer (2), a barrier layer (3), a source electrode (4), a drain electrode (5), an insulation medium layer (7), an insulated groove gate (8), a passivation layer (9), a source field plate (10), a drain field plate (12) and a protection layer (13); the source field plate is electrically connected with source electrode, and the drain field plate is electrically connected with the drain electrode, wherein, a groove (6) is opened on the barrier layer; and n floating field plates (11) are deposited on the passivation layer arranged between the source field plate and the drain field plate. All the floating field plates have the same size and are mutually independent, and the floating field plates are equidistantly distributed between the source field plate and the drain field plate. The n floating field plates, the source field plate and the drain field plate are completed on the passivation layer by one-time process. The transistor has the advantages of simple process, strong reliability and high output power, and can be used for fabricating power devices based on a wide band gap compound semiconductor material heterojunction.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and relates to semiconductor devices, in particular to a grooved insulating gate type source-drain compound field plate high electron mobility transistor based on a wide bandgap compound semiconductor material heterojunction structure, which can be used as a basic device of a power system . technical background [0002] In today's world, power semiconductor devices such as power rectifiers and power switches have been widely used in many power fields such as switching power supplies, automotive electronics, industrial control, radio communications, and motor control. Power semiconductor devices must have the following two important parameters, namely high breakdown voltage and low on-resistance. The Baliga figure of merit reflects the compromise relationship between breakdown voltage and on-resistance in power semiconductor devices. In order to meet the needs of high breakdown voltage a...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/778H01L29/06H01L21/336
Inventor 毛维杨翠郝跃过润秋
Owner XIDIAN UNIV
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