Chemical mechanical polishing method

Abstract

The invention discloses a technique of chemical mechanical polishing of TSVs (through silicon vias). The technique includes the steps of A, removing a copper covering layer with copper polishing solution and flattening the surface; B, removing a tantalum barrier layer and part of a dielectric layer with barrier layer polishing solution and flattening the surface; C, removing the dielectric layer with dielectric layer chemical mechanical polishing solution and reserving a silicon nitride layer. The capacity is increased by changing the polishing process; after the dielectric layer is polished, the process can be stopped by a silicon nitride stop layer, and the polishing process can be controlled well.

Description

technical field [0001] The present invention relates to a chemical mechanical polishing method, more specifically, to a chemical mechanical polishing process for through-silicon holes. Background technique [0002] With the development of integrated circuits, on the one hand, in the traditional IC industry, in order to improve integration, reduce energy consumption, and shorten delay time, the line width is getting narrower and narrower. On the other hand, due to physical limitations, the line width cannot be reduced infinitely. The semiconductor industry no longer relies solely on integrating more devices on a single chip to improve performance, but turns to multi-chip packaging. Through-silicon via (TSV) technology is widely recognized by the industry as a latest technology that realizes the interconnection between chips by making vertical conduction between chips and between wafers. TSV enables chips to be stacked in the three-dimensional direction with the highest densi...

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Problems solved by technology

[0008] In summary, in the previously published patents and literature, there is no polishing solution specifically for polishing the TSV barrier layer.

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