GaN-based trench metal oxide Schottky barrier diode and preparation method thereof
A Schottky potential and diode technology, applied in the direction of diodes, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of dielectric layer fatigue, device surge reliability reduction, weak surge resistance, etc., and achieve vertical electric field The effect of uniform distribution, improving device breakdown voltage, and improving anti-surge capability
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Embodiment 1
[0049] Such as Figure 6 As shown, a GaN-based trench metal oxide Schottky barrier diode structure in this example includes a GaN self-supporting substrate 2; an n-type lightly doped epitaxial layer 3 is arranged on the substrate; A plurality of groove structures arranged in parallel are formed in the lightly doped epitaxial layer 3, and each groove structure includes a p-type high-concentration GaN layer formed at the bottom and a dielectric layer 5 formed on the inner surface; the dielectric layer 5 is formed in the groove A small window is opened in the middle of the bottom of the groove; at the same time, it forms a Schottky contact with the n-type lightly doped epitaxial layer of the device, and a metal layer-anode 6 that forms an ohmic contact with the p-type high-concentration GaN layer; covers the substrate surface to form an ohmic Contact metal layer - cathode 1.
[0050] The specific preparation method of this embodiment, such as Figure 1 to Figure 6 shown, includi...
Embodiment 2
[0082] The final device structure of this embodiment is as follows Figure 7 As shown, compared with Example 1, the difference is that after the epitaxy of the p-type high-concentration GaN layer 4 of the device in Example 1 is completed, the following process steps are performed in this example:
[0083] 1. The side wall forms a MIS structure
[0084] 1.1. The dielectric layer 5 region is deposited on the surface of the device by atomic layer deposition;
[0085] 1.2. Coating photoresist on the dielectric layer 5, removing the photoresist on the top of the n-type lightly doped epitaxial layer 3 of the device and the p-type high-concentration GaN layer after exposure and development;
[0086] 1.3. Etching with buffered hydrofluoric acid to remove the dielectric layer 5 not covered by the photoresist;
[0087] 1.4. Use acetone to remove the photoresist. After completion, the device structure is as follows Figure 7 shown.
[0088] 2. Electrode evaporation
[0089] 2.1. Eva...
Embodiment 3
[0092] The final device structure of this embodiment is as follows Figure 12 As shown, compared with Example 1, the difference lies in the trench etching step 2 after the formation of the initial epitaxial structure, and the remaining steps are similar to Example 1. In this example, the following process steps are performed:
[0093] 1. Form a trench structure in the n-type lightly doped epitaxial layer 3
[0094] 1.1. Coating a 4-6 μm thick photoresist 8 on the n-type lightly doped epitaxial layer 3, the device structure is as follows Figure 9 shown;
[0095] 1.2. Place the wafer on a heating plate with a constant temperature and heat it, so that the photoresist 8 can be reflowed quickly. The device structure is as follows Figure 10 shown;
[0096] 1.3. Using the photoresist 8 as a barrier layer, the n-type lightly doped epitaxial layer 3 is etched by ICP to form an inclined mesa structure;
[0097] 1.4. Use acetone to remove the photoresist 8. After completion, the de...
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Abstract
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Application Information
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