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Systems and methods of forming tantalum silicide layers

a technology of silicide layer and metal silicon nitride, which is applied in the direction of coating, chemical vapor deposition coating, capacitor, etc., can solve the problem that the composition of formed metal silicon nitride barrier layer such as ta—si—n cannot be uniform across the substrate surface, and achieve the effect of minimizing detrimental gas phase reactions and improving the control of layer thickness

Inactive Publication Date: 2006-03-09
MICRON TECH INC
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  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The method achieves highly conformal and uniform tantalum silicide and tantalum silicon nitride layers, effectively preventing diffusion of oxygen, copper, and silicon, enhancing the reliability and performance of semiconductor devices by minimizing defects and ensuring sufficient barrier thickness.

Problems solved by technology

However, when PVD methods are used, the stoichiometric composition of the formed metal silicon nitride barrier layers such as Ta—Si—N can be non-uniform across the substrate surface due to different sputter yields of Ta, Si, and N. Due to the resulting poor layer conformality, defects such as pinholes often occur in such layers creating pathways to diffusion.

Method used

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  • Systems and methods of forming tantalum silicide layers
  • Systems and methods of forming tantalum silicide layers
  • Systems and methods of forming tantalum silicide layers

Examples

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Example 1

Pulsed Chemical Vapor Deposition of Tantalum Silicide

[0064] Using a pulsed CVD method, the following precursor compounds were pulsed for 200 cycles in a deposition chamber as described in FIG. 3 containing a borophosphosilicate glass (BPSG) substrate, each cycle consisting of pulses in the following order: (1) tantalum pentafluoride (Alfa Aesar, Ward Hill, Mass.; and (2) disilane (VOC Gases). During each cycle, excess amounts of each precursor compound not chemisorbed were purged from the chamber after chemisorption and prior to the introduction of the next precursor compound using an argon sweep at 30 mL / min and a vacuum pump. The substrate temperature was kept at approximately 275° C. throughout the entire deposition process.

[0065] At the end of the process, a 1700 Å thick miffor-like layer of tantalum silicide was formed having a resistivity of 255 μΩ-cm. The layer contained tantalum, silicon, and a trace of oxygen as determined by x-ray photoelectron spectroscopy (XP...

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Abstract

A method of forming (and apparatus for forming) tantalum silicide layers (including tantalum silicon nitride layers), which are typically useful as diffusion barrier layers, on a substrate by using a vapor deposition process with a tantalum halide precursor compound, a silicon precursor compound, and an optional nitrogen precursor compound.

Description

[0001] This is a divisional of U.S. patent application Ser. No. 10 / 229,813, filed Aug. 28, 2002, (pending), which is incorporated herein by reference.FIELD OF THE INVENTION [0002] This invention relates to methods of forming tantalum layers containing silicon (suicide layers) and optionally nitrogen (silicon-nitride layers) on substrates using a vapor deposition process. The formed tantalum-containing layers are particularly useful as diffusion barriers for polysilicon substrates to reduce diffusion of oxygen, copper, or silicon. BACKGROUND OF THE INVENTION [0003] In very-large-scale integration (VLSI) technology, tantalum suicide has been proposed to be useful in a variety of applications. These include: policide gate metallization (i.e., the use of tantalum silicide in combination with a doped polycrystalline silicon (poly-Si) underlayer as a low resistive gate metallization layer); silicide gate (i.e., the use of tantalum silicide as a directly deposited layer on a gate oxide to ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): C23C16/00C23C16/08C23C16/30C23C16/44C23C16/455H01L21/285H01L21/768
CPCC23C16/08C23C16/30C23C16/42C23C16/45523H01L28/57H01L21/28556H01L21/28562H01L21/76843H01L21/7687C23C16/45553
Inventor VAARTSTRA, BRIAN A.
Owner MICRON TECH INC
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