31results about How to "Convenient and cost-effective for manufacturing" patented technology

The present invention relates to medical devices which are adapted for application to a skin surface of a user and comprise a transcutaneous device which is supplied in a sterile condition. Thus, a medical device is provided, comprising a mounting surface adapted for application to the skin of a subject, a first portion having a first end adapted to penetrate the skin of the subject, and a second portion in fluid communication with the first portion and having a second end. The device further comprises enclosure means being transformable from an initial configuration encapsulating the first and second portions in an initial aseptic state, to a second configuration in which the ends of the first and second portions are allowed to communicate with the exterior through the enclosure means, wherein the enclosure means does not enclose the mounting surface.

A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is adjacent to the bumped terminal and extends laterally beyond the bumped terminal and the filler, and the filler contacts the bumped terminal in a cavity that extends through the bumped terminal.

A method of making a semiconductor chip assembly includes mechanically attaching a semiconductor chip that includes a conductive pad to a routing line, mechanically attaching and electrically connecting a metal particle to the routing line, wherein the routing line extends laterally beyond the metal particle towards the chip and the chip and the metal particle extend vertically beyond the routing line in the same direction, forming an encapsulant after attaching the chip and the metal particle to the routing line wherein the chip and the metal particle are embedded in the encapsulant, and forming a connection joint that electrically connects the routing line and the pad.

A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is contiguous with the bumped terminal and extends laterally beyond the bumped terminal and the metal pillar, and the metal pillar contacts and extends vertically beyond the bumped terminal.

A method of making a semiconductor chip assembly includes providing a metal base that includes a metal plate and a metal layer, providing a routing line that contacts the metal layer and an etch mask that contacts the metal plate, providing a semiconductor chip that includes a conductive pad, mechanically attaching the chip to the routing line, electrically connecting the routing line to the pad, and etching the metal base using a first wet chemical that is selective of the metal plate and then a second wet chemical etch that is selective of the metal layer and the etch mask to form a pillar from an unetched portion of the metal base that contacts the routing line.

Hemostatic devices for promoting blood clotting can include a substrate (e.g., gauze, textile, sponge, sponge matrix, one or more fibers, etc.), a hemostatic material disposed thereon such as kaolin clay, and a binder material such as crosslinked calcium alginate with a high guluronate monomer molar percentage disposed on the substrate to substantially retain the hemostatic material material. When the device is used to treat a bleeding wound, at least a portion of the clay material comes into contact with blood to accelerate clotting. Moreover, when exposed to blood, the binder has low solubility and retains a majority of the clay material on the gauze. A bandage that can be applied to a bleeding wound to promote blood clotting includes a flexible substrate and a gauze substrate mounted thereon.

A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a pillar etch mask that extends into a trench, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects the routing line and the pad, etching the metal base to form a metal pillar with a tip adjacent to the trench, and providing a contact terminal that includes the pillar etch mask and is a permanent part of the assembly.

A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a metal containment wall and a solder layer in which the metal containment wall includes a cavity and the solder terminal contacts the metal containment wall in the cavity, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects the routing line and the pad, etching the metal base to reduce contact area between the metal base and the routing line and between the metal base and the metal containment wall, and providing a solder terminal that includes the solder layer.

A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a metal containment wall and a solder terminal, and a connection joint that electrically connects the routing line and the pad. The metal containment wall includes a cavity, and the solder terminal contacts the metal containment wall in the cavity and is spaced from the routing line.

A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a filler, wherein the routing line contacts the bumped terminal and the filler, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then forming an insulative base that covers a peripheral portion of the bumped terminal.

The present invention discloses a semiconductor device package structure with redistribution layer (RDL) and through silicon via (TSV) techniques. The package structure comprises an electronic element which includes a dielectric layer on a backside surface of the electronic element, a plurality of first conductive through vias across through the electronic element and the dielectric layer, and a plurality of conductive pads accompanying the first conductive through vias on an active surface of the electronic element; a filler material disposed adjacent to the electronic element; a first redistribution layer disposed over the dielectric layer and the filler material, and connected to the first conductive through vias; a first protective layer disposed over the active surface of the electronic element, the conductive pads, and the filler material; and a second protective layer disposed over the redistribution layer, the dielectric layer, and the filler material.

A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line contacts the bumped terminal and the filler and extends laterally beyond the bumped terminal and the filler, and the filler contacts the bumped terminal in a cavity that extends through the bumped terminal.