Method for producing high-voltage grid drive chip for directly driving power device

A technology for power devices and driving chips, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of complex process, unsatisfactory design, large leakage current, etc., to increase impurity energy and reduce lateral The effect of spreading, reducing the total thickness

Active Publication Date: 2011-07-20
NINGBO SEMICON INT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the high-voltage gate drive chip, the low-voltage side drive control module works at the normal voltage as the control signal part; the high-voltage side drive control module mainly includes the high-voltage control signal part, which controls the high-voltage side gate signal; and the level shift module considers the low-voltage The side control signal is transmitted to the high-voltage side control area. Therefore, when realizing these functions, the following two aspects are mainly considered: one is the isolation of the high-voltage side drive control module and the low-voltage side drive control module. From the perspective of technology, the high-voltage side Isolation technology is mainly divided into three types: PN junction isolation, dielectric isolation and self-isolation. The self-isolation process is the simplest, but the leakage current is large; the cost of dielectric isolation is high, the process is complicated, and it is difficult to realize; the advantage of PN junction isolation technology is that the process is simple, The cost is low, so in the conventional CMOS process, PN junction isolation technology is mostly used, but according to the basic principle of PN junction breakdown, its withstand voltage breakdown point is generally not at the planar junction, but occurs on the surface of the junction, so that the PN junction breaks down in advance wear, resulting in failure to meet the design requirements, resulting in the inability to achieve a high voltage of tens of volts in the conventional CMOS process; on the other hand, the high-voltage device (that is, the lateral DMOS tube) that realizes the high-voltage side drive control module is in the conventional CMOS device On the basis of the process, N-type lateral DMOS devices are formed by increasing the reduced surface electric field region (RESURF, referred to as the down field region) and the P-type lightly doped region (referred to as the P-type lightly doped region).

Method used

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  • Method for producing high-voltage grid drive chip for directly driving power device
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  • Method for producing high-voltage grid drive chip for directly driving power device

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Embodiment 1

[0043] The present invention proposes a method for preparing a high-voltage gate drive chip for directly driving power devices, which is compatible with the high-voltage process and the conventional CMOS process, and on the basis of using conventional PN junction isolation, by implanting doping Boron ions form a P-type RESURF region on the N-type epitaxial layer, and at the same time use two layers of polysilicon (ie, the first layer of polysilicon and the second layer of polysilicon) on the surface of the PN junction to form a series of capacitive voltage dividers, such as figure 1 As shown, when the circuit is connected, the lower plate of the outermost capacitive voltage divider is grounded, and the upper plate of the innermost capacitive voltage divider is connected to a high potential, which effectively changes the surface electric field of the PN junction and changes the PN junction The direction of the electric force lines on the surface helps to reduce the electric fiel...

Embodiment 2

[0069] This embodiment is basically the same as Embodiment 1, and the preparation process of this embodiment is specifically as follows:

[0070] ① Material selection: select a P-type silicon wafer with a crystal orientation of (100) and a resistivity of 60ohm cm. as the initial material, and select a phosphorus-doped N-type silicon wafer as the epitaxial material. An N-type epitaxial layer 2 with a double-layer structure made of epitaxial materials is directly grown on the substrate layer, such as image 3 As shown, the epitaxial layer 2 includes a bottom epitaxial layer 2a and a top epitaxial layer 2b, and the substrate layer 1, the bottom epitaxial layer 2a and the top epitaxial layer 2b are grown sequentially from bottom to top.

[0071] ②The P-type isolation area is prepared by high-voltage junction isolation process (HVJI), such as Figure 4 As shown, the specific process is as follows:

[0072] ②-1, grow a layer of silicon dioxide with a thickness of 1100nm on the top...

Embodiment 3

[0086] This embodiment is basically the same as embodiment one and embodiment two, and the preparation process of this embodiment is specifically as follows:

[0087] ①Material selection: select a P-type silicon wafer with a crystal orientation of (100) and a resistivity of 50ohm·cm. An N-type epitaxial layer 2 with a double-layer structure made of epitaxial materials is directly grown on the substrate layer, such as image 3 As shown, the epitaxial layer 2 includes a bottom epitaxial layer 2a and a top epitaxial layer 2b, and the substrate layer 1, the bottom epitaxial layer 2a and the top epitaxial layer 2b are grown sequentially from bottom to top.

[0088] ②The P-type isolation area is prepared by high-voltage junction isolation process (HVJI), such as Figure 4 As shown, the specific process is as follows:

[0089] ②-1, grow a layer of silicon dioxide with a thickness of 1000nm on the top epitaxial layer 2b, and coat a layer of photolithographic mask layer on the silico...

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Abstract

The invention discloses a method for producing a high-voltage grid drive chip for directly driving a power device. By adopting a high-voltage junction isolating process, a high-voltage side drive control module is isolated from a low-voltage side drive control module; on the basis of the PN junction isolation in the conventional CMOS (Complementary Metal-Oxide-Semiconductor Transistor) transistorprocess, a surface electric field reducing region is formed on the surface of a PN junction; a capacitive voltage divider is formed by using two layers of polysilicon; the distribution of an electricfield on the surface of the PN junction is effectively changed; the high-voltage isolation of a high-voltage transverse DMOS (Double-Diffused Metal Oxide Semiconductor) transistor is formed; and a high-voltage N type DMOS transistor is obtained by forming a P type lightly-doped region. Compared with the conventional transverse DMOS transistor, the voltage resistant requirement of over 700V can bemet by additionally arranging a P type surface electric field reducing region structure and a dual-layer polysilicon capacitor structure; and meanwhile, the production method has concise work procedures and lower cost; and a high-voltage grid drive circuit device for directly driving the power device can be formed by only needing 13 structure levels.

Description

technical field [0001] The invention relates to a preparation process of a semiconductor chip, in particular to a preparation method of a high-voltage gate drive chip used to directly drive a power device. Background technique [0002] High-voltage gate drive chips are also called power integrated circuits (PIC, POWER INTERGARTED CIRCUIT), which is the product of the combination of power electronic device technology and microelectronic technology, and is a key component of mechatronics. High-voltage gate driver chips have a wide range of applications, such as electronic ballasts, motor drives, dimming, various power modules, and so on. [0003] The power module is made by integrating the power device and its drive circuit, protection circuit, interface circuit and other peripheral circuits on one or several chips. As the application of power modules becomes more and more extensive, power modules gradually develop from simple trigger functions to multi-functional application...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238H01L21/762H01L21/28H01L21/265H01L21/308
Inventor 谷健胡同灿
Owner NINGBO SEMICON INT CORP
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