Metal oxide semiconductor device and manufacturing method thereof

Abstract

The invention discloses a metal oxide semiconductor device and a manufacturing method thereof. The method comprises the following steps: forming an N-type MOSFET region and a P-type MOSFET region on asubstrate; forming an ultra-thin gate interface oxide layer; forming a ferroelectric material gate dielectric layer, a barrier metal layer, a polycrystalline silicon dummy gate layer and a hard mask;forming a gate laminated structure, a gate side wall, N-type and P-type source/drain extension regions and source/drain regions thereof; depositing an oxide and silicon nitride interlayer dielectriclayer and flattening the oxide and silicon nitride interlayer dielectric layer; depositing a first metal gate layer after the pseudo polycrystalline silicon gate is removed; and respectively doping the first metal gate; and depositing a second metal gate layer. The metal oxide semiconductor device is finally annealed, so that a dipole is formed on an interface, and an effective work function is adjusted; and the metal electrode clamping effect in the annealing process induces generation of a ferroelectric negative capacitance effect, so that the surface potential of the channel is amplified, and the device has an ultra-steep subthreshold slope and an improved on/off current ratio.

Description

technical field [0001] The disclosure belongs to the technical field of semiconductors, and relates to a metal oxide semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous shrinking of the feature size of CMOS devices and the continuous improvement of integration, the power consumption of integrated circuit chips is also increasing. However, because the MOS transistor is based on the hot carrier diffusion conduction mechanism, it cannot overcome the Boltzmann limit, that is, the subthreshold slope (SS) of the device cannot be less than 60mV / dec at room temperature. Limited by the subthreshold swing, if the threshold voltage (V T ), will result in off-state leakage (I OFF ) increases exponentially, so that the leakage power consumption of the device rises linearly. Therefore, the Boltzmann theory limits the operating voltage of the device and cannot be further reduced as the feature size of the device shrinks. Integrated c...

AI Technical Summary

Problems solved by technology

In the traditional field effect transistor, C S and C ins are all positive, resulting in (1+C S / C ins ) can never be less than 1, so it cannot be less than 60mV / dec. The negative capacitance effect of ferroelectric materials can make the ferroelectric capacitance negative, that is, C F <0

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