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All-solid-state organic electrochemical transistor and preparation method thereof

An all-solid-state, transistor technology, used in semiconductor/solid-state device manufacturing, electric solid-state devices, circuits, etc., can solve the problems of inconvenient large-scale integration, long-term application and portability of devices, avoid inconvenient storage and application, and increase contact. area, enhancing the effect of electrochemical doping

Active Publication Date: 2022-06-03
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is: how to provide an all-solid-state organic stretchable electrochemical transistor based on a multilayer porous semiconductor layer and its preparation method, aiming to solve the inconvenience of large-scale integration of devices caused by liquid electrolytes in electrochemical transistors, long-term Disadvantages of application and portability, while using solid electrolytes to infiltrate multi-layer porous organic semiconductor layers to balance electron transport and ion permeation / transport in the semiconductor layer, improving the overall performance of the device

Method used

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  • All-solid-state organic electrochemical transistor and preparation method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0037] Example 1 (control group):

[0038] 1. Clean the transparent glass substrate with a surface roughness of less than 1nm, and dry it in an incubator for more than 6 hours after cleaning;

[0039] 2. Coat a layer of detergent on the glass substrate, pour the PU on the glass substrate coated with detergent, vibrate slightly, spread the solution, and place it in a vacuum drying oven to dry (30°C, 12h), carefully peel off the flexible substrate from the glass substrate with a blade after drying;

[0040] 3. Spray the electrode of carbon paste (80-150nm) on the PU substrate;

[0041] 4. Clean the microscope slides with surface roughness less than 1nm, and dry them in an incubator for more than 6 hours after cleaning;

[0042] 5. Spin-coat the prepared PVA solution on a microscope slide (3000rpm, 60s), and dry the spin-coated slide (110°C, 2min) to obtain a PVA sacrificial layer;

[0043] 6. Under the condition of humidity of 10%RH, spin-coat the prepared P3HT mixed solution (...

Embodiment 2

[0049] 1. Clean the transparent glass substrate with a surface roughness of less than 1nm, and dry it in an incubator for more than 6 hours after cleaning;

[0050] 2. Coat a layer of detergent on the glass substrate, pour the PU on the glass substrate coated with detergent, vibrate slightly, spread the solution, and place it in a vacuum drying oven to dry (30°C, 12h), carefully peel off the flexible substrate from the glass substrate with a blade after drying;

[0051] 3. Spray the electrode of carbon paste (80-150nm) on the PU substrate;

[0052] 4. Clean the microscope slides with surface roughness less than 1nm, and dry them in an incubator for more than 6 hours after cleaning;

[0053] 5. Spin-coat the prepared PVA solution on a microscope slide (3000rpm, 60s), and dry the spin-coated slide (110°C, 2min) to obtain a PVA sacrificial layer;

[0054] 6. Under the condition of humidity of 88%RH, spin-coat the prepared P3HT mixed solution (P3HT:SEBS=2:1) ​​onto the PVA sacri...

Embodiment 3

[0060] 1. Clean the transparent glass substrate with a surface roughness of less than 1nm, and dry it in an incubator for more than 6 hours after cleaning;

[0061] 2. Coat a layer of detergent on the glass substrate, pour the PU on the glass substrate coated with detergent, vibrate slightly, spread the solution, and place it in a vacuum drying oven to dry (30°C, 12h), carefully peel off the flexible substrate from the glass substrate with a blade after drying;

[0062] 3. Spray the electrode of carbon paste (80-150nm) on the PU substrate;

[0063] 4. Clean the microscope slides with surface roughness less than 1nm, and dry them in an incubator for more than 6 hours after cleaning;

[0064] 5. Spin-coat the prepared PVA solution on a microscope slide (3000rpm, 60s), and dry the spin-coated slide (110°C, 2min) to obtain a PVA sacrificial layer;

[0065] 6. Under the condition of humidity of 10%RH, spin-coat the prepared P3HT mixed solution (P3HT:SEBS=2:1) ​​onto the PVA sacri...

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Abstract

The invention discloses an all-solid-state organic electrochemical transistor and a preparation method thereof, belongs to the field of flexible organic electrochemical transistors or synaptic electronics, and aims to solve the defects of inconvenience in large-scale integration, long-term application and portability of devices caused by liquid electrolyte in electrochemical transistors. An electrode layer and an ionic gel electrolyte layer; the electrodes comprise a source electrode, a drain electrode and a gate electrode; a plurality of porous semiconductor layers are arranged above the source electrode and the drain electrode, and an ionic gel electrolyte layer is arranged above the gate electrode; the ionic gel electrolyte layer formed by mixing the polymer and the ionic liquid according to the proportion is dripped on the multi-layer porous semiconductor film, so that the injection rate of electrolyte ions can be increased and the transconductance of the device can be optimized while the large contact area between the semiconductor active layer and the ionic gel electrolyte layer is ensured.

Description

technical field [0001] The invention relates to the field of flexible organic electrochemical transistors or synaptic electronics, in particular to an all-solid-state organic electrochemical transistor and a preparation method thereof. Background technique [0002] In the past few decades, artificial intelligence, big data and the Internet of Things have been continuously developed and updated due to the substantial increase in the computing power of computers. However, modern complementary metal-oxide-semiconductor (CMOS) hardware based on the von Neumann architecture is hindered by physically separated logic and memory cells (von Neumann efficiency bottleneck), which severely affects the computer's energy consumption, access speed , bandwidth and response time. [0003] Synaptic neuronal connections form the neural networks that control all innate and learned behaviors in humans. As the smallest computing units in the brain, they are capable of massively parallel informa...

Claims

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Application Information

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IPC IPC(8): H01L51/05H01L51/40
CPCH10K71/10H10K71/80H10K10/46H10K10/484H10K77/111Y02P70/50Y02E10/549
Inventor 彭玉洁于军胜高林邓津易刘常健田镇南
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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