Method and structure for fabricating non volatile memory arrays
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[0021] According to the present invention, techniques for fabricating integrated circuit devices are provided. More particularly, the invention provides a method and structure for a non-volatile memory device, commonly called a metal oxide-nitride-oxide on silicon (“MONOS”) memory device. Merely by way of example, the present invention provides a method for processing a cell region of the MONOS memory separately while protecting peripheral regions of the device for efficiency and improvement in device characterization. The peripheral regions are then processed while protecting the cell region in other embodiments. Certain steps are performed to process both the peripheral and cell region for efficiency and improved process integration purposes.
[0022] Depending upon the embodiment, the present invention includes various features, which may be used. These features include the following:
[0023] 1. Buried BL formation including using an HDP oxide layer and using a reverse mask to remov...
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