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GaN E/D integrated device production method based on two-step oxidation method

A technology of secondary oxidation and integrated devices, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc. Process consistency and controllability are not high, etching damage reduces device saturation current, etc., to achieve high process stability and consistency, low interface state density, and good on-chip consistency.

Active Publication Date: 2015-08-12
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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  • Application Information

AI Technical Summary

Problems solved by technology

[0004] On the one hand, based on the depletion device material structure, the traditional gate trenching process is used to realize the enhanced device. The original barrier layer thickness (about 20-30nm) needs to be thinned to less than 5nm, and the controllability of the barrier layer deep trenching process And repeatability is difficult to guarantee, and it will inevitably bring etching damage, which will reduce the saturation current of the device and increase the gate leakage; and the fluorine ion implantation technology also has low process consistency and controllability, and fluorine ion mobility at high temperature The resulting device reliability problems make it difficult to meet the needs of large-scale applications
On the other hand, the design of the new intrinsic enhancement material structure can better control the threshold voltage of the enhancement device and improve the consistency of the device. At present, it has become the mainstream method for preparing a single enhancement device. However, due to the limitation of the material structure itself, Incompatible with the material structure requirements of E and D-mode devices, it is not suitable for E / D integration. For example, in the E / D integrated circuit developed by HRL laboratory, different material structures are used for E-mode devices and D-mode devices. , to obtain intrinsic enhancement-mode devices and depletion-mode devices

Method used

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  • GaN E/D integrated device production method based on two-step oxidation method
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  • GaN E/D integrated device production method based on two-step oxidation method

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preparation example Construction

[0026] Such as Figure 1~3 As shown, a GaN E / D integrated device preparation method based on the secondary oxidation method, the preparation steps include the following in sequence:

[0027] a) On the substrate 1, the nucleation layer 2, the AlyGa1-yN buffer layer 3, the GaN channel layer 4, the AlN insertion layer 5, and the barrier layer 6 are sequentially grown to form a GaN HEMT heterostructure, and the heterointerface forms a two-dimensional Electron Gas 7;

[0028] b) After the conventional ohmic metal electrode 8 is completed, the oxygen plasma treatment method is used for the first oxidation to consume part of the barrier layer 6 to reduce its thickness to half of the original, and at the same time the first layer of oxidized medium 9 is formed on the surface; The two-dimensional electron gas 7 is still retained in the time channel;

[0029] c) Perform device isolation 10, make a mask 11, open holes in the area 12 reserved for making the gate pin of the E-mode device...

Embodiment 1

[0034] An AlN nucleation layer 2 is grown on the SiC substrate, and then 1 μm GaN is grown as a buffer layer 3, 40nm undoped GaN is used as a channel layer 4, a 1.5nm AlN insertion layer 5 is finally covered with a 6nm undoped Al0.72In0.18N potential Barrier layer 5, in which the concentration of two-dimensional electron gas 7 is 1.87×10 13cm -2 , forming AlInN / AlN / GaN heterostructure materials for E / D integration. After the conventional ohmic metal electrode 8 is completed, the first oxidation treatment is carried out. The oxidation condition can consume the 3nm Al0.72 In0.18N barrier layer 5 to form the first layer of oxide medium 9, and then adopt the method of B ion implantation Isolate 10, make a mask 11, open a window by photolithography in the area 12 reserved for making the gate pin of the E-mode device, remove the gate pin dielectric 9 of the E-mode device, and then perform the second oxidation. The oxidation conditions are the same as the first oxidation conditions ...

Embodiment 2

[0036] An AlN nucleation layer 2 is grown on the SiC substrate, and then 1 μm Al0.08Ga0.92N is grown as the buffer layer 3, 20nm undoped GaN is grown as the channel layer 4, 2nm AlN is inserted into the layer 5, and finally 4nm undoped Al0. 5Ga0.5N barrier layer 5, in which the concentration of two-dimensional electron gas 7 is 1.32×10 13 cm -2 , forming AlGaN / AlN / GaN heterostructure materials for E / D integration. After the conventional ohmic metal electrode 8 is completed, the first oxidation treatment is carried out. The oxidation condition can consume the 2nm Al0.5Ga0.5N barrier layer 5 to form the first layer of oxide medium 9, and then use B ion implantation method for isolation 10. Make a mask 11, open a window by photolithography in the area 12 reserved for making the gate pin of the E-mode device, remove the gate pin dielectric 9 of the E-mode device, and then perform the second oxidation. The oxidation condition is completely the same as the first oxidation condition...

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Abstract

The invention discloses a GaN E / D integrated device production method based on a two-step oxidation method. Based on the traditional depletion A1GaN(A1InN) / A1N / GaN heterostructure, the barrier layer thickness can be controlled accurately by using the oxidation method, and the thickness of the barrier layer can be reduced to a half of the original thickness after the first oxidation process, and the high concentration electron gas can be maintained in the channel, and the medium generated by the oxidation can be used as the D-mode device gate dielectric. The medium of the E-mode device gate dielectric area can be removed, and the barrier layer can be consumed completely after the second oxidation process, and the two-dimensional electron gas can be consumed in the channel, and at the same time, the E-mode device gate dielectric can be generated. The same two-step oxidation technologies can be completed, the E-mode device technology and the D-mode device technology can be completely compatible, and the thicknesses of the gate dielectrics are the same, and therefore the device structures and the device performances can be cooperated with each other. The production of the E-mode device can be realized by using the oxidation method to reduce the thickness of the barrier layer, and the processing controllability is high; the E-mode technology and the D-mode technology can be completely compatible, and the thickness of the E-mode device gate dielectric and the thickness of the D-mode device gate dielectric are the same, the performances are cooperated with each other, and then the yield of the GaN E / D integrated circuit can be improved.

Description

technical field [0001] The invention relates to the technical field of a semiconductor field effect transistor and an integrated circuit thereof, in particular to a method for preparing a GaN E / D integrated device based on a secondary oxidation method. Background technique [0002] In recent years, with the practical development of GaN microwave power devices, the application of GaN materials in high-speed digital and mixed signal circuits has attracted more and more attention, aiming to give full play to its high electron drift speed and high breakdown voltage. The advantage is to obtain an ideal voltage swing while maintaining high-speed performance, so as to deal with the problem that the breakdown voltage of Si-based integrated circuits decreases rapidly as the device size shrinks. Especially in the past two years, research on GaN high-frequency devices and E / D integration has gradually become an international research hotspot, and is known as the next-generation GaN e...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/06H01L29/78H01L21/28H01L21/8248
Inventor 孔月婵周建军孔岑
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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