A portable high aspect ratio interlayer connection micro vertical thermoelectric device and its preparation method
An interlayer connection, vertical structure technology, applied in the manufacture/processing of thermoelectric devices, thermoelectric device components, thermoelectric devices using only the Peltier or Seebeck effect, etc. problems, to achieve the effect of less cracks, fast and efficient heat conduction and heat dissipation, and smooth microscopic morphology
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
preparation example Construction
[0044] The preparation method of the portable high-aspect-ratio interlayer connection miniature vertical structure thermoelectric device of the present invention includes the following steps:
[0045] (1). The insulating material is selected as the substrate, and the bottom conductive electrode layer 2 is deposited by physical vapor deposition method PVD, electroless plating method, chemical vapor deposition method CVD, and magnetron sputtering. The photolithography mask method in the micro-nano processing technology is used to realize the area division of the bottom conductive electrode layer 2, and dry etching or wet etching is used to remove the excess material of the bottom conductive electrode layer 2. Or it can be laser cut through a stainless steel mask or other masks to obtain the required bottom conductive electrode pattern.
[0046] (2) The division of the deposition area of the P-type semiconductor thermoelectric layer 6 and the N-type semiconductor thermoelectric laye...
Embodiment 1
[0054] Using polyimide with a thickness of micrometers as the bottom insulating base layer, using electrochemical deposition to deposit bismuth telluride-based materials to prepare P-type semiconductor thermoelectric layers and N-type semiconductor thermoelectric layers, copper as the bottom conductive electrode layer, and Ag as the layer Interconnection structure barrier / connection layer, the middle layer of the interlayer connection structure uses Bi with a melting point of 140℃ 57 Sn 42 Ag 1 .
[0055] 1. The bottom insulating base layer uses polyimide as the base material. First, the polyimide is chemically degreasing, roughened, and sensitized.
[0056] Chemical degreasing fluidNa 3 PO 4 50g / L, Na 2 CO 3 30g / L, NaOH 25g / L, temperature 50℃
Coarse treatment liquidNaOH 40g / L, KMnO 4 90g / L, temperature room temperature, 15min
SensitizerSnCl 2 10-30g / L, HCl 40-100mL / L, appropriate amount of metal tin particles, immersion for 5min at room temperature
Activation solu...
Embodiment 2
[0070] The difference from Embodiment 1 is that the electrochemical deposition method is not used, and the magnetron sputtering method is directly used to deposit materials on the substrate sequentially, eliminating the subsequent electrode etching steps. The process is simple, but the preparation method is relatively expensive. Choose SiO with single-sided oxide layer 2 Silicon wafer as the base material, SiO 2 As an insulating layer to isolate the bottom conductive silicon wafer.
[0071] 1. Use electron beam evaporation to deposit 10-15nm Ti and 100-150nm Au on the base silicon wafer as the bottom layer, then electroplating gold to thicken the bottom electrode, and etch the bottom gold electrode using photolithography and humidification as the bottom electrode material .
[0072] 2. Use magnetron sputtering to sputter bismuth telluride-based materials as P-type semiconductor thermoelectric layers and N-type semiconductor thermoelectric layers.
[0073] 3. Pd of 1-5μm is electropl...
PUM
| Property | Measurement | Unit |
|---|---|---|
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More