Low power consumption charge trapping type storage device based on graphene oxide quantum dots and preparation method thereof
A technology of graphene quantum dots and charge trapping, applied in electric solid devices, circuits, electrical components, etc., can solve the problems of high power consumption and high operating voltage, and achieve the effects of low power consumption, long-lasting data storage, and low operating voltage
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[0034] Example 1
[0035] The charge trapping memory structure prepared by the present invention is as follows: figure 1 As shown, its structure is that SiO is sequentially integrated on the Si substrate 1 2 Tunneling layer 2, GQODs / Zr 0.5 hf 0.5 O 2 Trap layer, SiO 2 Barrier layer 5, Pd electrode film layer 6, GQODs / Zr 0.5 hf 0.5 O 2 The trapping layer consists of GQODs layer 3 and Zr 0.5 hf 0.5 O 2 Layer 4 is formed, and GQODs layer 3 is a single-layer graphene oxide quantum dot layer.
[0036] Si substrate 1 is a p-type Si material with 100 crystal orientation; SiO 2 The thickness of tunneling layer 2 is 2~5nm; GQODs / Zr 0.5 hf 0.5 O 2 The thickness of the trapping layer 4 is 5~80nm, preferably 10~40nm; SiO 2 The thickness of the barrier layer 5 is 5-50 nm, most preferably 5-20 nm; the Pd electrode film layer 6 is a circular electrode film with a thickness of 20-150 nm and a diameter of 60-300 μm.
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[0037] Example 2
[0038] The preparation method of the charge trapping memory of the present invention, the steps are as follows:
[0039] (a) The p-Si substrate was ultrasonically cleaned in acetone, alcohol, and deionized water in sequence, and HF solution (volume ratio H 2 O:HF=2:1) clean for 2 minutes, then ultrasonically clean with deionized water, remove it with N 2 Blow dry; put the treated silicon substrate into a high temperature annealing furnace, and anneal and grow SiO in an oxygen environment 2 Tunneling layer: first use 20s to raise from room temperature to 200°C, 60s to raise from 200°C to 500°C, 500°C to hold for 150s, 10s to drop to 100°C, 40s to drop from 100°C to room temperature, the obtained SiO 2 The thickness of the tunneling layer is 3nm, and SiO is obtained 2 / Si structure substrate.
[0040] (c) The SiO 2 / Si structure substrate is placed on the rotating suction cup of SC-1B glue dispenser, the speed is set to 4000r / min, the graphene oxide qua...
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