Preparation method of N-type PERT dual-side battery

A double-sided cell and double-sided solar cell technology, which is applied in the manufacture of circuits, electrical components, and final products, can solve the problem of no modification effect on the suede surface of silicon wafers, no improvement in square resistance uniformity, and inability to remove boron-rich layers, etc. problem, achieve the effect of improving passivation effect, improving square resistance uniformity, and battery opening voltage

Inactive Publication Date: 2018-08-24
JIANGSU SHUNFENG PHOTOVOLTAIC TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In the above preparation method, the BSG on the front side and the PSG on the back side are directly removed in the HF aqueous solution after the formation of the front and back junctions. Good, the boron-rich layer on the front cannot be removed, the square resistance uniformity is not improved, the silicon substrate on the silicon wafer surface is directly exposed after cleaning, the dangling bonds on the substrate surface cannot be saturated, and there is no passivation effect on the battery surface

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  • Preparation method of N-type PERT dual-side battery

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0026] Select N-type silicon for the following operations: S1: texturing; S2: front boron doping junction; S3: back etching to remove edge and back PN junction; S4: back phosphorus doping junction; S5: removal of back PSG and front BSG; S6: alkali, pickling; S7: wet oxygen passivation; S8: aluminum oxide deposited on the front; S9: SiNx deposited by PECVD on the front; S10: SiNx deposited by PECVD on the back; S11: screen printing and sintering; S12: laser isolation, Get an N-type bifacial battery.

[0027] Step S6 specifically includes: using KOH and hydrogen peroxide mixed solution to micro-etch the surface of the silicon wafer to remove residual impurities, and using HF acid solution to pickle to neutralize the lye and remove the silicon oxide layer on the surface. The mass concentration of KOH in the mixed solution is 2%, the mass concentration of hydrogen peroxide is 5%, the temperature of the mixed solution is 25°C, and the alkaline washing time is 4 minutes. The mass c...

Embodiment 2

[0030] On the basis of Embodiment 1, step S6 and step S7 are further described:

[0031] Step S6 is specifically: use KOH and hydrogen peroxide mixed solution to micro-etch the surface of the silicon wafer and remove residual impurities. The mixed solution has a mass concentration of KOH of 1%, a mass concentration of hydrogen peroxide of 3%, a temperature of the mixed solution of 40°C, and an alkali cleaning time of 4 minutes; Use HF pickling to neutralize the lye and remove the silicon oxide layer on the surface. The mass concentration of the HF acid solution is 7%, the temperature of the acid solution is 25°C, and the pickling time is 3 minutes;

[0032] Step S7 specifically includes: using nitric acid passivation method to passivate the surface of the silicon wafer, the concentration of nitric acid is 63%, the passivation temperature is 25° C., and the time is 6 minutes.

Embodiment 3

[0034] On the basis of Embodiment 1, step S6 and step S7 are further described:

[0035] Step S6 is specifically: use KOH and hydrogen peroxide mixed solution to micro-etch the surface of the silicon wafer and remove residual impurities, the mass concentration of KOH in the mixed solution is 0.5%, the mass concentration of hydrogen peroxide is 1.5%, the temperature of the mixed solution is 60°C, and the alkali cleaning time is 4 minutes; HF pickling neutralizes the lye and removes the silicon oxide layer on the surface, the mass concentration of HF is 4%, the temperature of the acid solution is 25°C, and the pickling time is 4 minutes;

[0036] Step S7 specifically includes: using nitric acid passivation method to passivate the surface of the silicon wafer, the concentration of nitric acid is 58%, the passivation temperature is 25° C., and the time is 10 minutes.

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Abstract

The invention relates to a preparation method of an N-type PERT dual-side battery. The preparation method comprises the following steps of S1, texturing; S2, front-surface boron doping and junction fabrication; S3, back-surface etching to remove an edge and a back-surface PN junction; S4, back-surface phosphor doping and junction fabrication; S5, back-surface PSG and front-surface BSG removal; S6,alkali / acid washing, in which a surface of a silicon wafer is slightly etched by a mixed liquid of an alkali and hydrogen peroxide, residual impurity is removed, an HF acid solution is used for pickling to neutralize the alkali liquid, and a silicon oxide layer on the surface is removed; S7, wet oxygen passivation; S8, aluminum oxide deposition on a front surface; S9, SiNx deposition on the frontsurface by PECVD; S10, SiNx deposition on a back surface by PEVCD; S11, silk-screen printing and sintering; and S12, laser isolation. By the preparation method, extremely high boron-rich layer dopedon a surface of a boron expansion surface can be removed, the sheet resistance uniformity is improved, meanwhile, the passivation effect of the N-type battery is improved, and the open voltage and theconversion efficiency of the battery are obviously improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to solar cell manufacturing technology, in particular to a preparation method of an N-type PERT double-sided cell. Background technique [0002] Conventional fossil fuels are being exhausted day by day. Among the existing sustainable energy sources, solar energy is undoubtedly the cleanest, most common and most potential alternative energy source. Solar power generation devices, also known as solar cells or photovoltaic cells, can directly convert solar energy into electrical energy. The principle of power generation is based on the photovoltaic effect of semiconductor PN junctions. At present, conventional batteries are limited by the technology, and there is not much room for efficiency improvement. The improvement of battery efficiency must rely on the development of new battery technology. Compared with conventional P-type single crystal silicon,...

Claims

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Application Information

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IPC IPC(8): H01L31/18
CPCH01L31/18Y02P70/50
Inventor 瞿辉徐春曹玉甲杨三川
Owner JIANGSU SHUNFENG PHOTOVOLTAIC TECH CO LTD
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