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A method for preparing silicon epitaxial wafers for high-voltage power devices

A technology of high-voltage power devices and silicon epitaxial wafers, which is applied in the manufacture of semiconductor/solid-state devices, electrical components, coatings, etc., can solve the problems of out-of-control resistivity, discrete thickness distribution, and high defect density, and reduce the disturbance of resistivity , bright surface, the effect of increasing the reaction rate

Active Publication Date: 2021-05-28
CHINA ELECTRONICS TECH GRP NO 46 RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to overcome the existing problems of discrete thickness distribution, out-of-control resistivity and high defect density in the preparation process of silicon epitaxial wafers for high-voltage power devices, and to develop a method for preparing silicon epitaxial wafers for high-voltage power devices.

Method used

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  • A method for preparing silicon epitaxial wafers for high-voltage power devices
  • A method for preparing silicon epitaxial wafers for high-voltage power devices
  • A method for preparing silicon epitaxial wafers for high-voltage power devices

Examples

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Effect test

Embodiment 1

[0032] (1) Heat the base of the reaction chamber, set the temperature to 1180 °C, flow in hydrogen chloride gas for etching, set the flow rate to 18 L / min, and set the etching time to 240 sec. The residual substances deposited in the early stage of the base were removed by etching, and then the reaction chamber was purged with a large flow rate of 90 L / min hydrogen to remove the impurities etched from the base from the reaction chamber, and then the base was cleaned. Cool down to 60°C.

[0033] (2) Install the silicon substrate on the pedestal of the reaction chamber, heat the epitaxial pedestal, use a nonlinear gradient to raise the temperature of the silicon substrate to 1180°C, set the heating rate to 200°C / min, and heat up to The temperature was kept constant for 2 minutes at 800°C and 900°C, so that the thermal stress accumulated during the heating process could be released in time. A low flow rate of hydrogen chloride gas was introduced into the reaction chamber. The flo...

Embodiment 2

[0043] (1) Heat the base of the reaction chamber, set the temperature to 1180 °C, flow in hydrogen chloride gas for etching, set the flow rate to 18 L / min, and set the etching time to 240 sec. The residual substances deposited in the early stage of the base were removed by etching, and then the reaction chamber was purged with a large flow rate of 90 L / min hydrogen to remove the impurities etched from the base from the reaction chamber, and then the base was cleaned. Cool down to 60°C.

[0044] (2) Install the silicon substrate on the base of the reaction chamber, use a nonlinear gradient to raise the temperature of the silicon substrate to 1160°C, set the heating rate to 200°C / min, and when the temperature rises to 800°C and 900°C The average temperature was kept constant for 2 minutes, so that the thermal stress accumulated during the heating process could be released in time. A low flow rate of hydrogen chloride gas was introduced into the reaction chamber. The flow rate of...

Embodiment 3

[0054] (1) Heat the base of the reaction chamber, set the temperature to 1180 °C, flow in hydrogen chloride gas for etching, set the flow rate to 18 L / min, and set the etching time to 240 sec. The residual substances deposited in the early stage of the base were removed by etching, and then the reaction chamber was purged with a large flow rate of 90 L / min hydrogen to remove the impurities etched from the base from the reaction chamber, and then the base was cleaned. Cool down to 60°C.

[0055] (2) Install the silicon substrate on the pedestal of the reaction chamber, heat the epitaxy pedestal, use a nonlinear gradient to raise the temperature of the silicon substrate to 1160°C, set the heating rate to 200°C / min, and heat up to The temperature was kept constant for 2 minutes at 800°C and 900°C, so that the thermal stress accumulated during the heating process could be released in time. A low flow rate of hydrogen chloride gas was introduced into the reaction chamber. The flow ...

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Abstract

The invention discloses a method for preparing a silicon epitaxial wafer for a high-voltage power device. This method purifies the reaction chamber of the epitaxial equipment by long-time purging of large flow of hydrogen before epitaxial growth, and reduces the content of impurities accumulated inside the chamber; the non-linear gradient heating is adopted to release the stress accumulated in the heating stage in time, reducing the The probability of defect generation; by shortening the distance between the quartz bell jar and the pedestal of the reaction chamber of the epitaxial equipment, and adopting a large-flow ratio of trichlorosilane and hydrogen, the reaction rate is significantly improved, and the crystallization quality of the silicon epitaxial wafer is guaranteed. Realize high-speed epitaxial growth under the premise; by adopting the method of segmented growth of silicon epitaxial layer, the comprehensive control problems of thickness, resistivity and crystal quality in the existing preparation process are overcome; the surface of the silicon epitaxial wafer produced is bright and free of dislocations , stacking fault, slip line and fog defects, realize the controllability of material indicators such as thickness, resistivity and defects, and meet the use requirements of high-voltage power devices.

Description

technical field [0001] The invention relates to the preparation technology of semiconductor epitaxial materials, in particular to a preparation method of silicon epitaxial wafers for high-voltage power devices. Background technique [0002] At present, with the rapid development of microwave, electric power and optoelectronic systems in the direction of high response speed, high sensitivity, and high integration, there is an urgent need for high-quality high-voltage power devices, because each system component needs to embed hundreds of power devices , the failure of a single device will cause non-negligible interference to the working state of the whole machine system, so the quality characteristics of the silicon epitaxial wafer used as the substrate are becoming more and more stringent. Since the working environment of high-voltage power devices determines the properties of thick layers of silicon epitaxial wafers with high resistance and low defects, it is generally requ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02C23C16/24
CPCC23C16/24H01L21/02381H01L21/02532H01L21/02658H01L21/02664
Inventor 周幸李明达王楠赵扬李普生
Owner CHINA ELECTRONICS TECH GRP NO 46 RES INST
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