A metal through-type back-emitter crystalline silicon solar cell based on an n-type silicon wafer and its preparation method
A technology of crystalline silicon solar cells and back emitters, which is applied in the manufacture of circuits, electrical components, and final products. Reduce compound speed and improve the effect of unfavorable factors
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Embodiment 1
[0014] like figure 1 As shown, a metal through-type back-emitter crystalline silicon solar cell based on an n-type silicon wafer includes an n-type crystalline silicon wafer substrate 4, SiN x Film layer 1, SiO 2 Film layer 2, shallow doping n + Layer 3, p-type contact electrode 5, local contact emitter p + Layer 6, laser sintered hole 7, front contact electrode 8, heavily doped n ++ The layer 9, the through hole 10 and the n-type contact electrode 11; the n-type crystalline silicon wafer substrate 4 is a polycrystalline silicon wafer of 156×156 mm, and the resistivity is 1.5Ωcm. The specific preparation process is as follows: laser-drilling the n-type crystalline silicon wafer substrate 4 to form through holes 10 with a diameter of 160 μm, then cleaning and texturing and chemical polishing on the backside; then prefabricating fine gates on the front side of the silicon wafer substrate 4 The laser is heavily doped at the line to form a heavily doped n ++ Layer 9, the squa...
Embodiment 2
[0016] like figure 1 As shown, the metal through-type back-emitter crystalline silicon solar cell based on the n-type silicon wafer has the same structure as the first embodiment; The specific preparation process is as follows: laser-drilling the n-type crystalline silicon wafer substrate 4 to form through holes 10 with a diameter of 220 μm, then cleaning and texturing and chemical polishing on the back; then prefabricating fine gates on the front of the silicon wafer substrate 4 The laser is heavily doped at the line to form a heavily doped n ++ Layer 9, the square resistance is 45Ω / □; the non-thin gate line and the inner wall of the through hole 10 are diffused to form a surface field shallowly doped n + Layer 3, the square resistance is 85Ω / □; the edge PN junction of the silicon wafer is plasma etched, and the corrosive paste is printed by the mask method to remove the n formed on the back side during phosphorus diffusion. + layer, and then use HF solution to clean the si...
Embodiment 3
[0018] like figure 1 As shown, the metal through-type back-emitter crystalline silicon solar cell based on the n-type silicon wafer has the same structure as the first embodiment; The specific preparation process is as follows: laser drilling the n-type crystalline silicon wafer substrate 4 to form through holes 10 with a diameter of 180 μm, then cleaning and texturing and chemical polishing on the backside; then prefabricating fine gates on the front side of the silicon wafer substrate 4 The laser is heavily doped at the line to form a heavily doped n ++ Layer 9, the square resistance is 45Ω / □; the non-thin gate line and the inner wall of the through hole 10 are diffused to form a surface field shallowly doped n + Layer 3, the square resistance is 80Ω / □; the edge PN junction of the silicon wafer is plasma etched, and the corrosive paste is printed by the mask method to remove the n formed on the back side during phosphorus diffusion. +layer, and then use HF solution to clea...
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