Power semiconductor device with insulation structure in cell and preparation method

A technology for power semiconductors and power devices, which is applied in the field of power semiconductor devices with insulating structures in cells and their preparation, and can solve the problems of low reliability of strong fields and poor temperature tolerance.

Pending Publication Date: 2021-02-19
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
View PDF11 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the above problems, the present invention provides a power semiconductor device with an insulating structure in the cell and a preparation method, which are used to at least partially solve the poor temperature tolerance and low reliability of the strong field of the insulating material in the cell of the traditional SiC power device. technical problem

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Power semiconductor device with insulation structure in cell and preparation method
  • Power semiconductor device with insulation structure in cell and preparation method
  • Power semiconductor device with insulation structure in cell and preparation method

Examples

Experimental program
Comparison scheme
Effect test

preparation example Construction

[0041] The second embodiment of the present disclosure provides a method for manufacturing a power semiconductor device with an insulating structure in a cell, please refer to Figure 4 , including: S1, cleaning the power device cell unit 100, forming a gate oxide layer 230 and a gate electrode contact 210 on the upper part of the cell unit 100; S2, autothermally oxidizing the surface of the gate electrode contact 210 to form a dense dielectric 300; Dielectric 300 first deposits high dielectric constant or high thermal conductivity and its combination thin film layer 310, and then deposits passivation dielectric thin film layer 320; Electrical constant or high thermal conductivity and its combination thin film layer 310 ; S4 , depositing source electrode contact 200 on the upper surface of power device unit cell 100 and composite interlayer 220 .

[0042] Cleaning the power device cell unit 100 in S1 is standard surface cleaning. The gate oxide layer 230 is made by thermal oxi...

Embodiment 1

[0054] structured as Figure 5 As shown, among them,

[0055] Step S1: cleaning the power device cell unit, first cleaning the surface of the power device cell unit 100, specifically:

[0056] a. Use acetone and ethanol to ultrasonically clean three times in sequence, and then rinse with deionized water.

[0057] b. Put the SiC epitaxial material substrate after organic ultrasonication into concentrated sulfuric acid and hydrogen peroxide solution and cook for at least 10 minutes.

[0058] c. Boil the SiC epitaxial material substrate boiled in concentrated sulfuric acid with No. 1 solution and No. 2 solution for 15 minutes, rinse with deionized water, and blow dry with nitrogen gas for use. The No. 1 liquid is a mixture of ammonia, hydrogen peroxide and deionized water, the volume ratio of ammonia: hydrogen peroxide: deionized water = 1: 2: 5, and the No. 2 liquid is a mixture of hydrochloric acid, hydrogen peroxide and deionized water. Mixed solution, hydrochloric acid: hy...

Embodiment 2

[0069] structured as Figure 6 As shown, among them,

[0070] Steps S1-S2, and S4 are the same as in Embodiment 1, the difference is,

[0071] Step S3: forming a composite inner insulating layer, the composite inner insulating layer includes a dielectric 300, a dielectric 310 and a dielectric 320 from bottom to top, and the specific steps include:

[0072] By physical, chemical and other etching methods, such as reactive ion etching (RIE) or inductively coupled plasma (ICP), etc., the gate electrode contact 210 is micro-etched, and the etching gas can be SF 6 / O 2 、NF 3 / Ar, CF 4 、H 2 / SiH 4 , HBr, CHF 3 / O 2 、C 4 f 8 / O 2 、BCl 3 / Cl 2 gas or combination to form an arcuate structure, using a low-temperature oxidation process (900°C) to autothermally oxidize the surface of the polysilicon gate electrode contact 210 to form a dense dielectric 300, the thickness of the dielectric 300 is 1-100nm, and pass through 1000 -1200°C annealing process for passivation.

[00...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to view more

Abstract

The invention provides a power semiconductor device with an insulation structure in a cell, and the device comprises a power device cell unit (100), a gate oxide layer (230), a gate electrode contact(210) which is formed at the upper part of the cell unit (100), and a composite internal insulation layer (220) which is formed on the surfaces of the gate oxide layer (230) and the gate electrode contact (210). The composite inner insulating layer (220) comprises a compact dielectric layer (300), a thin film layer (310) with high dielectric constant or high thermal conductivity and combination thereof and a passivation dielectric thin film layer (320) from bottom to top; or the composite inner insulating layer (220) comprises a compact dielectric layer (300), a passivation dielectric film layer (320) and a thin film layer (310) with high dielectric constant or high thermal conductivity and combination thereof from bottom to top; source electrode contacts (200) are formed on the upper surfaces of the power device cell units (100) and the composite inner insulating layer (220). By changing the structure and the morphology of the composite inner insulating layer, the high-field reliability and the thermal stability of the power device are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a power semiconductor device with an insulating structure in a cell and a preparation method thereof. Background technique [0002] Silicon carbide (SiC) has the characteristics of wide band gap, high thermal conductivity, high breakdown field strength, and high saturation electron drift rate. Compared with traditional silicon (Si) materials, it has excellent physical and electrical properties, and also has Excellent physical and chemical stability, strong radiation resistance and mechanical strength. Therefore, SiC-based wide bandgap materials are very suitable for making high-temperature, high-power, high-frequency, high-radiation and other power electronic devices. [0003] SiC power Schottky barrier diode (SBD) and power metal-oxide-semiconductor field-effect transistor (MOSFET) power devices have been very mature in the commercialization process, especially no...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/423H01L29/16H01L29/78H01L21/336
CPCH01L29/42364H01L29/1608H01L29/78H01L29/66477
Inventor 申占伟刘兴昉闫果果赵万顺王雷孙国胜曾一平
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap