Method for preparing polarization-insensitive semiconductor optical amplifier
An optical amplifier and semiconductor technology, applied in semiconductor/solid-state device manufacturing, optics, nonlinear optics, etc., can solve problems such as increasing the difficulty of SOA+SSC and device cost, coupling alignment, and self-alignment difficulties
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Embodiment 1
[0043] Embodiment 1: Polarization-insensitive SOA+integration of all active SSCs
[0044] The polarization insensitive semiconductor optical amplifier prepared by the present invention is integrated with active SSC, and its preparation steps include as follows:
[0045] 1) On the n-type indium phosphorus substrate, a layer of SiO with a thickness of 100-150 nanometers (nm) is grown by plasma chemical vapor deposition technology 2 Dielectric film;
[0046] 2) Prepare a photoresist plate by using ordinary ultraviolet exposure technology;
[0047] 3) Use the photolithography plate prepared in step 2 to photolithography and etch the substrate in step 1 to obtain the corresponding SiO 2 The dielectric film pattern of the mask, such as figure 1 shown;
[0048] 4) Using the low-pressure MOVPE narrow-strip growth technology, sequentially grow an n-type indium phosphide (InP) buffer layer, an undoped indium gallium arsenide phosphide (InGaAsP) active layer, and a p-type InP capping...
Embodiment 2
[0057] The preparation method of this kind of device is basically the same as that of Embodiment 1, except that the wavelength drift needs to be further increased when the InGaAsP quaternary layer is grown in a narrow strip width to reduce the absorption of the passive SSC part; in addition, the electrode pattern is changed to make the SSC Partially covered with electrodes. Embodiment 3: Polarization-insensitive SOA+active SSC+passive SSC+EA integration:
Embodiment 3
[0057] The preparation method of this kind of device is basically the same as that of Embodiment 1, except that the wavelength drift needs to be further increased when the InGaAsP quaternary layer is grown in a narrow strip width to reduce the absorption of the passive SSC part; in addition, the electrode pattern is changed to make the SSC Partially covered with electrodes. Embodiment 3: Polarization-insensitive SOA+active SSC+passive SSC+EA integration:
[0058] Since the integration of the electroabsorption modulator is involved here, the preparation steps are slightly different from the previous two examples, and the specific steps are as follows:
[0059] 1. Use figure 1 Photolithography, etch the n-InP substrate by photolithography to form a dielectric film mask pattern with smooth and flat edges;
[0060] 2. Perform a narrow strip width epitaxy on the chip etched by photolithography in step 1, including n-InP buffer layer, undoped InGaAsP active and passive waveguide l...
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